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AT29LV040A-20TU PDF预览

AT29LV040A-20TU

更新时间: 2024-11-25 03:15:59
品牌 Logo 应用领域
爱特美尔 - ATMEL 光电二极管
页数 文件大小 规格书
16页 370K
描述
Flash, 512KX8, 200ns, PDSO32, 8 X 20 MM, PLASTIC, MO-142BD, TSOP1-32

AT29LV040A-20TU 数据手册

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Features  
Single Voltage, Range 3V to 3.6V Supply  
3-volt Only Read and Write Operation  
Software Protected Programming  
Fast Read Access Time – 150 ns  
Low Power Dissipation  
– 15 mA Active Current  
– 40 µA CMOS Standby Current  
Sector Program Operation  
4-megabit  
(512K x 8)  
3-volt Only  
256-byte Sector  
Flash Memory  
– Single Cycle Reprogram (Erase and Program)  
– 2048 Sectors (256 Bytes/Sector)  
– Internal Address and Data Latches for 256 Bytes  
Two 16K Bytes Boot Blocks with Lockout  
Fast Sector Program Cycle Time – 20 ms Max  
Internal Program Control and Timer  
DATA Polling for End of Program Detection  
Typical Endurance > 10,000 Cycles  
CMOS and TTL Compatible Inputs and Outputs  
Commercial and Industrial Temperature Ranges  
Green (Pb/Halide-free) Packaging Option  
AT29LV040A  
1. Description  
The AT29LV040A is a 3-volt only in-system Flash Programmable and Erasable Read  
Only Memory (PEROM). Its 4 megabits of memory is organized as 524,288 words by  
8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology,  
the device offers access times to 150 ns, and a low 54 mW power dissipation. When  
the device is deselected, the CMOS standby current is less than 40 µA. The device  
endurance is such that any sector can typically be written to in excess of 10,000  
times. The programming algorithm is compatible with other devices in Atmel’s 3-volt  
only Flash memories.  
To allow for simple in-system reprogrammability, the AT29LV040A does not require  
high input voltages for programming. Three-volt-only commands determine the opera-  
tion of the device. Reading data out of the device is similar to reading from an  
EPROM. Reprogramming the AT29LV040A is performed on a sector basis; 256 bytes  
of data are loaded into the device and then simultaneously programmed.  
During a reprogram cycle, the address locations and 256 bytes of data are captured at  
microprocessor speed and internally latched, freeing the address and data bus for  
other operations. Following the initiation of a program cycle, the device will automati-  
cally erase the sector and then program the latched data using an internal control  
timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the  
end of a program cycle has been detected, a new access for a read or program can  
begin.  
0334G–FLASH–2/05  

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