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AT25P1024W1-10SJ-2.7 PDF预览

AT25P1024W1-10SJ-2.7

更新时间: 2024-10-27 19:48:03
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
17页 193K
描述
EEPROM, 128KX8, Serial, CMOS, PDSO20, 0.300 INCH, PLASTIC, MS-013AC, SOIC-20

AT25P1024W1-10SJ-2.7 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP,
针数:20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.82其他特性:HARDWARE AND SOFTWARE DATA PROTECTION
最大时钟频率 (fCLK):1 MHzJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
内存密度:1048576 bit内存集成电路类型:EEPROM
内存宽度:8湿度敏感等级:2
功能数量:1端子数量:20
字数:131072 words字数代码:128000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:128KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:2.65 mm
串行总线类型:SPI最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.5 mm最长写入周期时间 (tWC):10 ms
Base Number Matches:1

AT25P1024W1-10SJ-2.7 数据手册

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Features  
Serial Peripheral Interface (SPI) Compatible  
Supports SPI Modes 0 (0,0) and 3 (1,1)  
2.1 MHz Clock Rate  
128-byte Page Mode Only for Write Operations  
Low-voltage and Standard-voltage Operation  
– 2.7 (VCC = 2.7V to 5.5V)  
Block Write Protection  
– Protect 1/4, 1/2, or Entire Array  
Write Protect (WP) Pin and Write Disable Instructions for  
Both Hardware and Software Data Protection  
Self-Timed Write Cycle (5 ms Typical)  
High Reliability  
– Endurance: 100,000 Write Cycles  
– Data Retention: >40 Years  
20-lead JEDEC SOIC and 8-lead Leadless Array Package  
SPI Serial  
EEPROMs  
1M (131,072 x 8)  
Description  
AT25P1024  
The AT25P1024 provides 1,048,576 bits of serial electrically erasable programmable  
read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device  
is optimized for use in many industrial and commercial applications where low power  
and low voltage operation are essential. The AT25P1024 is available in space saving  
20-lead JEDEC SOIC and 8-lead LAP packages.  
Note:  
Not Recommended for new  
design; Please refer to  
AT25FS010 datasheet.  
20-lead SOIC  
Table 1. Pin Configurations  
CS  
SO  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
HOLD  
NC  
Pin Name  
CS  
Function  
2
Chip Select  
NC  
3
NC  
4
NC  
SCK  
SI  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
Ground  
NC  
5
NC  
NC  
6
NC  
NC  
7
NC  
SO  
NC  
8
NC  
WP  
GND  
9
SCK  
SI  
GND  
VCC  
WP  
10  
Power Supply  
Write Protect  
Suspends Serial Input  
No Connect  
8-lead Leadless Array  
HOLD  
NC  
VCC 8  
HOLD 7  
SCK 6  
SI 5  
1 CS  
2 SO  
3 WP  
4 GND  
Bottom View  
The AT25P1024 is enabled through the Chip Select pin (CS) and accessed via a 3-  
wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial  
Clock (SCK). All programming cycles are completely self-timed, and no separate  
erase cycle is required before write.  
1082I–SEEPR–7/06  

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