Datasheet > AT25P1024_06

AT25P1024_06

更新时间： 2024-10-27 04:33:07

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
17页	194K
描述
SPI Serial EEPROMs

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中文翻译

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数据手册

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AT25P1024_06 数据手册

Features

• Serial Peripheral Interface (SPI) Compatible

• Supports SPI Modes 0 (0,0) and 3 (1,1)

• 2.1 MHz Clock Rate

• 128-byte Page Mode Only for Write Operations

• Low-voltage and Standard-voltage Operation

– 2.7 (V_CC= 2.7V to 5.5V)

• Block Write Protection

– Protect 1/4, 1/2, or Entire Array

• Write Protect (WP) Pin and Write Disable Instructions for

Both Hardware and Software Data Protection

• Self-Timed Write Cycle (5 ms Typical)

• High Reliability

– Endurance: 100,000 Write Cycles

– Data Retention: >40 Years

• 20-lead JEDEC SOIC and 8-lead Leadless Array Package

SPI Serial

EEPROMs

1M (131,072 x 8)

Description

AT25P1024

The AT25P1024 provides 1,048,576 bits of serial electrically erasable programmable

read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device

is optimized for use in many industrial and commercial applications where low power

and low voltage operation are essential. The AT25P1024 is available in space saving

20-lead JEDEC SOIC and 8-lead LAP packages.

Note:

Not Recommended for new

design; Please refer to

AT25FS010 datasheet.

20-lead SOIC

Table 1. Pin Configurations

VCC

HOLD

Pin Name

Function

Chip Select

SCK

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

GND

SCK

GND

VCC

Power Supply

Write Protect

Suspends Serial Input

No Connect

8-lead Leadless Array

HOLD

VCC 8

HOLD 7

SCK 6

SI 5

1 CS

2 SO

3 WP

4 GND

Bottom View

The AT25P1024 is enabled through the Chip Select pin (CS) and accessed via a 3-

wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial

Clock (SCK). All programming cycles are completely self-timed, and no separate

erase cycle is required before write.

1082I–SEEPR–7/06

12 3 4 5 6 7...17

中文翻译

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