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AT17LV256-10JU PDF预览

AT17LV256-10JU

更新时间: 2024-10-27 20:23:35
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟内存集成电路
页数 文件大小 规格书
23页 670K
描述
IC SRL CONFG EEPROM 256K 20-PLCC

AT17LV256-10JU 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:GREEN, PLASTIC, MS-018AA, LCC-20
Reach Compliance Code:compliantFactory Lead Time:6 weeks
风险等级:2.21最长访问时间:80 ns
其他特性:IT CAN OPERATES ON 4.75-5.25 RANGE SUPPLY VOLTAGE ALSO最大时钟频率 (fCLK):10 MHz
数据保留时间-最小值:90耐久性:100000 Write/Erase Cycles
JESD-30 代码:S-PQCC-J20JESD-609代码:e3
长度:8.9662 mm内存密度:262144 bit
内存集成电路类型:CONFIGURATION MEMORY内存宽度:1
湿度敏感等级:2功能数量:1
端子数量:20字数:262144 words
字数代码:256000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256KX1封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC20,.4SQ
封装形状:SQUARE封装形式:CHIP CARRIER
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:4.572 mm最大待机电流:0.00015 A
子类别:EEPROMs最大压摆率:0.01 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8.9662 mm
写保护:HARDWAREBase Number Matches:1

AT17LV256-10JU 数据手册

 浏览型号AT17LV256-10JU的Datasheet PDF文件第2页浏览型号AT17LV256-10JU的Datasheet PDF文件第3页浏览型号AT17LV256-10JU的Datasheet PDF文件第4页浏览型号AT17LV256-10JU的Datasheet PDF文件第5页浏览型号AT17LV256-10JU的Datasheet PDF文件第6页浏览型号AT17LV256-10JU的Datasheet PDF文件第7页 
AT17LV65(1), AT17LV128(1), AT17LV256,  
AT17LV512, AT17LV010, AT17LV002, AT17LV040  
FPGA Configuration EEPROM Memory  
3.3V and 5.0V System Support  
Note 1.  
AT17LV65 and AT17LV128  
are Not Recommended for  
New Designs (NRND) and  
are Replaced by AT17LV256.  
DATASHEET  
Features  
EE Programmable Serial Memories Designed to Store Configuration Programs  
for Field Programmable Gate Arrays (FPGAs)  
̶
̶
̶
65,536 x 1-bit(1)  
131,072 x 1-bit(1)  
262,144 x 1-bit  
̶
̶
524,288 x 1-bit  
̶
̶
2,097,152 x 1-bit  
4,194,304 x 1-bit  
1,048,576 x 1-bit  
Supports both 3.3V and 5.0V Operating Voltage Applications  
In-System Programmable (ISP) via 2-wire Bus  
Simple Interface to SRAM FPGAs  
Compatible with the Atmel® AT6000, AT40K and AT94K Devices, Altera®  
FLEX®, APEXDevices, ORCA®, Xilinx® XC3000, XC4000, XC5200,  
Spartan®, Virtex® FPGAs  
Cascadable Read-back to Support Additional Configurations or Higher-density  
Arrays  
Very Low-power CMOS EEPROM Process  
Programmable Reset Polarity  
Available in 6mm x 6mm x 1mm 8-lead LAP (Pin-compatible with 8-lead SOIC  
Package), 8-lead PDIP, 8-lead SOIC, 20-lead PLCC, 20-lead SOIC and  
44-lead TQFP Packages  
Emulation of the Atmel AT24CXXX Serial EEPROMs  
Low-power Standby Mode  
High-reliability  
̶
̶
Endurance: 100,000 Write Cycles  
Data Retention: 90 Years for Industrial Parts (at 85C)  
Green (Pb/Halide-free/RoHS Compliant) Package Options Available  
Description  
The AT17LV FPGA Configuration EEPROMs (Configurators) provide an easy-to-  
use, cost-effective configuration memory solution for Field Programmable Gate  
Arrays. The AT17LV devices are packaged in the 8-lead LAP, 8-lead PDIP, 8-lead  
SOIC, 20-lead PLCC, 20-lead SOIC and 44-lead TQFP options(Table 1). The  
AT17LV Configurators use a simple serial-access procedure to configure one or  
more FPGA devices. The user can select the polarity of the reset function during  
programming. These devices also support a write protection mechanism within its  
programming mode.  
Atmel-2321J-FPGA-AT17LV65-128-256-512-010-002-040-Datasheet_102014  
 

AT17LV256-10JU 替代型号

型号 品牌 替代类型 描述 数据表
AT17LV010-10JU ATMEL

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