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AT17C040A-40TI PDF预览

AT17C040A-40TI

更新时间: 2024-11-23 21:16:19
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器内存集成电路
页数 文件大小 规格书
13页 104K
描述
Configuration Memory, 4MX1, Serial, CMOS, PQFP32, PLASTIC, TQFP-32

AT17C040A-40TI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:LQFP, TQFP32,.35SQ,32
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.92JESD-30 代码:S-PQFP-G32
JESD-609代码:e0长度:7 mm
内存密度:4194304 bit内存集成电路类型:CONFIGURATION MEMORY
内存宽度:1功能数量:1
端子数量:32字数:4194304 words
字数代码:4000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:4MX1封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:TQFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:1.27 mm最大待机电流:0.0005 A
子类别:EEPROMs最大压摆率:0.01 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
写保护:HARDWAREBase Number Matches:1

AT17C040A-40TI 数据手册

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Features  
Serial EEPROM Family for Configuring Altera FLEX® Devices  
Simple Interface to SRAM FPGAs  
EE Programmable 4-Mbit Serial Memories Designed to Store Configuration Programs  
for Field Programmable Gate Arrays (FPGAs)  
Cascadable Read Back to Support Additional Configurations or Future Higher-density  
Arrays  
Low-power CMOS EEPROM Process  
Programmable Reset Polarity  
Available in the Space-efficient Surface-mount PLCC Package  
In-System Programmable Via 2-wire Bus  
Emulation of Atmel’s AT24CXXX Serial EEPROMs  
Available in 3.3V 5% LV and 5V 5% C Versions  
System-friendly READY Pin  
FPGA  
Configuration  
EEPROM  
Memory  
4-megabit  
Description  
The AT17C040A and AT17LV040A (high-density AT17A Series) FPGA Configuration  
EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration mem-  
ory for programming Altera FLEX® devices. The AT17A Series is packaged in the  
popular 32-pin TQFP. The AT17A Series family uses a simple serial-access procedure  
to configure one or more FPGA devices. The AT17A Series organization supplies  
enough memory to configure one or multiple smaller FPGAs. Using a feature of the  
AT17A Series, the user can select the polarity of the reset function by programming  
internal EEPROM bytes. The AT17A parts generate their own internal clock and can  
be used as a system “master” for loading the FPGA devices.  
Altera Pinout  
AT17C040A  
AT17LV040A  
The Atmel devices also support a system-friendly READY pin. The READY pin is used  
to simplify system power-up considerations.  
The AT17A Series Configurators can be programmed with industry-standard program-  
mers, or Atmel’s ATDH2200E Programming Kit.  
Pin Configurations  
32 TQFP  
1
2
3
4
5
6
7
8
24  
DCLK  
WP1  
23 SER_EN  
22  
21  
20 READY  
19  
18  
17  
OE  
Rev. 2283A–04/01  

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