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AT17C128-10CI PDF预览

AT17C128-10CI

更新时间: 2024-11-25 23:31:55
品牌 Logo 应用领域
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页数 文件大小 规格书
20页 253K
描述
Configuration EEPROM

AT17C128-10CI 数据手册

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Features  
EE Programmable 65,536 x 1-, 131,072 x 1-, and 262,144 x 1-bit Serial Memories  
Designed to Store Configuration Programs for Field Programmable Gate  
Arrays (FPGAs)  
In-System Programmable (ISP) via 2-wire Bus  
Simple Interface to SRAM FPGAs  
Compatible with Atmel AT6000, AT40K and AT94K Devices, Altera FLEX®, APEX™  
Devices, Lucent ORCA® FPGAs, Xilinx XC3000, XC4000, XC5200, Spartan®,  
VirtexFPGAs, Motorola MPA1000 FPGAs  
Cascadable Read-back to Support Additional Configurations or Higher-density Arrays  
Low-power CMOS EEPROM Process  
Programmable Reset Polarity  
FPGA  
Configuration  
EEPROM  
Available in 6 mm x 6 mm x 1 mm 8-lead LAP (Pin-compatible with 8-lead SOIC/VOIC  
Packages), 8-lead PDIP, 8-lead SOIC and 20-lead PLCC Packages (Pin Compatible  
Across Product Family)  
Emulation of Atmel’s AT24CXXX Serial EEPROMs  
Available in 3.3V 10% LV and 5V 5% C Versions  
Low-power Standby Mode  
Memory  
64-kilobit, 128-kilobit  
Description  
and 256-kilobit  
The AT17C65/128/256 and AT17LV65/128/256 (low-density AT17 Series) FPGA  
configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective config-  
uration memory for Field Programmable Gate Arrays. The low-density AT17 Series is  
packaged in the 8-lead LAP, the 8-lead PDIP, the 8-lead SOIC and the popular 20-lead  
PLCC. The AT17 Series uses a simple serial-access procedure to configure one or  
more FPGA devices. The user can select the polarity of the reset function by program-  
ming four EEPROM bytes. These devices also support a write-protection mechanism  
within its programming mode.  
AT17C65  
AT17LV65  
AT17C128  
AT17LV128  
AT17C256  
AT17LC256  
The AT17 Series Configurators can be programmed with industry-standard program-  
mers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable.  
Rev. 1636E–12/01  

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