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AS7E128K32P-12XT PDF预览

AS7E128K32P-12XT

更新时间: 2022-12-01 21:44:09
品牌 Logo 应用领域
MICROSS 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
9页 190K
描述
EEPROM Module, 128KX32, 120ns, Parallel, CMOS, CPGA66, 1.090 X 1.090 INCH, CERAMIC, PGA-66

AS7E128K32P-12XT 数据手册

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AS7E128K32  
128K x 32 EEPROM  
AUSTIN SEMICONDUCTOR, INC.  
AC READ Characteristics (-55˚C TA 125ºC; Vcc = 5V ± 10%)  
Parameter  
Symbol  
tACC  
Min  
Max  
120  
120  
50  
Min  
Max  
150  
150  
55  
Min  
Max  
200  
200  
55  
Units  
ns  
Address to Output Delay  
CE to Output Delay  
OE to Output Delay  
tCE(1)  
ns  
tOE(2)  
0
0
0
0
0
0
ns  
C
E or OE to Output Float  
tDF(3,4)  
50  
55  
55  
ns  
Output Hold from OE, CE  
or Address, whichever  
occurs first  
tOH  
0
0
0
ns  
AC Read Waveforms (1,2,3,4)  
ADDRESS VALID  
ADDRESS  
CE  
tCE  
tOE  
tDF  
OE  
tACC  
tOH  
HIGH Z  
OUTPUT  
VALID  
OUTPUT  
Notes:  
1. CE may be delayed to tACC-tCE after the address transition  
without inpact on tACC  
3. tDF is specified from OE or CE whichever occurs first (CL =  
5pF).  
.
2. OE may be delayed to tCE-tOE after the falling edge of CE  
without inpact on tCE or by tACC-tOE after an address change  
4. This parameter is characterized and is not 100% tested.  
without inpact on tACC  
.
Output Test Load  
Input Test Waveforms and Measurement level  
AC Test Conditions  
5.0V  
1.8K  
Input Pulse Levels  
0V to 3.0V  
5nS  
100pF  
1.3K  
Input Rise and Fall Times  
Input and Output  
1.5V  
Timing Reference Levels  
AS7E128K32  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
REV. 1/98  
DS000034  
7-28  

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