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AS7C331MFT18A-75TQC PDF预览

AS7C331MFT18A-75TQC

更新时间: 2024-11-03 03:02:51
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
19页 512K
描述
Standard SRAM, 1MX18, 7.5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

AS7C331MFT18A-75TQC 数据手册

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January 2005  
AS7C331MFT18A  
®
3.3V 1M x 18 Flow-through synchronous SRAM  
Features  
• Organization: 1,048,576 words x18 bits  
• Fast clock to data access: 6.8/7.5/8.5/10 ns  
• Fast OE access time: 3.5/4.0 ns  
• Fully synchronous flow-through operation  
• Asynchronous output enable control  
• Available 100-pin TQFP packages  
• Multiple chip enables for easy expansion  
• 3.3 V core power supply  
• 2.5 V or 3.3V I/O operation with separate VDDQ  
• Linear or interleaved burst control  
• Common data inputs and data outputs  
• Snooze mode for reduced power-standby  
Individual byte write and global write  
Logic block diagram  
LBO  
CLK  
ADV  
ADSC  
ADSP  
CLK  
CS  
CLR  
Burst logic  
1M x 18  
Memory  
array  
20 18  
20  
20  
Q
D
A[19:0]  
Address  
CS  
register  
CLK  
18  
18  
2
GWE  
BWb  
D
DQb  
Byte Write  
registers  
CLK  
Q
BWE  
BWa  
D
Q
DQa  
Byte Write  
registers  
CLK  
CE0  
CE1  
OE  
Output  
buffers  
D
Q
Q
Input  
registers  
Enable  
register  
CE  
CLK  
CE2  
CLK  
D
Enable  
delay  
register  
CLK  
Power  
down  
ZZ  
OE  
18  
DQ[a,b]  
Selection guide  
-68  
7.5  
6.8  
285  
90  
-75  
8.5  
7.5  
275  
90  
-85  
10  
-10  
12  
Units  
ns  
Minimum cycle time  
Maximum clock access time  
Maximum operating current  
Maximum standby current  
8.5  
250  
80  
10  
ns  
230  
80  
mA  
mA  
mA  
Maximum CMOS standby current (DC)  
60  
60  
60  
60  
1/21/05, v 1.4  
Alliance Semiconductor  
1 of 19  
Copyright © Alliance Semiconductor. All rights reserved.  

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