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AS4C16M16S-7TCN PDF预览

AS4C16M16S-7TCN

更新时间： 2024-01-07 22:43:22
品牌 Logo 应用领域
ALLIED 时钟动态存储器ISM频段光电二极管内存集成电路
页数 文件大小 规格书
55页 1954K
描述
16MX16 SYNCHRONOUS DRAM, 5.4ns, PDSO54, 0.400 INCH, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, TSOPII-54

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AS4C16M16S-7TCN 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：TSOP2包装说明：0.400 INCH, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, TSOPII-54
针数：54Reach Compliance Code：compliant
风险等级：5.66访问模式：FOUR BANK PAGE BURST
最长访问时间：5.4 ns其他特性：AUTO/SELF REFRESH
JESD-30 代码：R-PDSO-G54长度：22.22 mm
内存密度：268435456 bit内存集成电路类型：SYNCHRONOUS DRAM
内存宽度：16功能数量：1
端口数量：1端子数量：54
字数：16777216 words字数代码：16000000
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：16MX16
封装主体材料：PLASTIC/EPOXY封装代码：TSOP2
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：GULL WING端子节距：0.8 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：10.16 mmBase Number Matches：1

AS4C16M16S-7TCN 数据手册

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FEBRUARY 2011  
AS4C16M16S  
256Mb / 16M x 16 bit Synchronous DRAM (SDRAM)  
Alliance Memory  
Table 1. Key Specifications  
AS4C16M16S  
tCK3 Clock Cycle time (min.)  
tAC3 Access time from CLK (max.)  
tRAS Row Active time (min.)  
-5/6/7  
5/6/7 ns  
4.5/5.4/5.4 ns  
40/42/49 ns  
55/60/63 ns  
Features  
Fast access time from clock: 4.5/5.4/5.4 ns  
Fast clock rate: 200/166/143 MHz  
Fully synchronous operation  
Internal pipelined architecture  
4M word x 16-bit x 4-bank  
•
•
•
•
•
•
tRC  
Row Cycle time (min.)  
Table 2. Ordering Information  
Programmable Mode registers  
- CAS Latency: 2, or 3  
Part Number  
Frequency  
Package  
TSOP II  
TSOP II  
TSOP II  
TSOP II  
TFBGA  
AS4C16M16S-5TCN  
AS4C16M16S-6TCN  
AS4C16M16S-6TIN  
AS4C16M16S-7TCN  
AS4C16M16S-7BCN  
T : indicates TSOP II package  
B : indicates TFBGA package  
N : indicates Pb free and Halogen free  
200 MHz  
166 MHz  
166 MHz  
143 MHz  
143 MHz  
- Burst Length: 1, 2, 4, 8, or full page  
- Burst Type: interleaved or linear burst  
- Burst stop function  
Auto Refresh and Self Refresh  
8192 refresh cycles/64ms  
CKE power down mode  
Single +3.3V power supply  
Interface: LVTTL  
54-pin 400 mil plastic TSOP II package  
- Pb free and Halogen free  
•
•
•
•
•
•
Overview  
The AS4C16M16S SDRAM is a high-speed CMOS  
synchronous DRAM containing 256 Mbits. It is internally  
configured as 4 Banks of 4M word x 16 DRAM with a  
synchronous interface (all signals are registered on the  
positive edge of the clock signal, CLK). Read and write  
accesses to the SDRAM are burst oriented; accesses  
start at selected location and continue for a programmed  
number of locations in a programmed sequence.  
Accesses begin with the registration of a BankActivate  
command which is then followed by a Read or Write  
command.  
The AS4C16M16S provides for programmable Read  
or Write burst length of 1, 2, 4, 8, or full page, with a  
burst termination option. An auto precharge function  
may be enabled to provide a self-timed row precharge  
that is initiated at the end of the burst sequence. The  
refresh functions, either Auto or Self Refresh are easy to  
use.  
By having a programmable mode register, the system  
can choose the most suitable modes to maximize its  
performance.  
These devices are well suited for  
application requiring high memory bandwidth and  
particularly well suited to high performance PC  
applications.  
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AS4C16M16SA-6TIN ALSC 256M – (16Mx16bit) Synchronous DRAM (SDRAM)

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AS4C16M16SA-7TCN ALSC 256M – (16Mx16bit) Synchronous DRAM (SDRAM)

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