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APL5934DKAI-TRG PDF预览

APL5934DKAI-TRG

更新时间: 2024-02-15 10:15:16
品牌 Logo 应用领域
茂达 - ANPEC 输出元件调节器
页数 文件大小 规格书
24页 527K
描述
3A, Ultra Low Dropout (0.23V Typical) Linear Regulator

APL5934DKAI-TRG 技术参数

是否Rohs认证: 符合生命周期:Active
Reach Compliance Code:compliant风险等级:5.69
JESD-609代码:e3峰值回流温度(摄氏度):NOT SPECIFIED
调节器类型:ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR端子面层:Matte Tin (Sn)
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

APL5934DKAI-TRG 数据手册

 浏览型号APL5934DKAI-TRG的Datasheet PDF文件第4页浏览型号APL5934DKAI-TRG的Datasheet PDF文件第5页浏览型号APL5934DKAI-TRG的Datasheet PDF文件第6页浏览型号APL5934DKAI-TRG的Datasheet PDF文件第8页浏览型号APL5934DKAI-TRG的Datasheet PDF文件第9页浏览型号APL5934DKAI-TRG的Datasheet PDF文件第10页 
APL5934  
Pin Description  
PIN  
NO.  
TDFN3x3-10  
FUNCTION  
SOP-8P  
TDFN2x2-8  
APL5934E  
NAME  
APL5934B/D APL5934/C APL5934B/D APL5934/C  
Ground pin of the circuitry.  
8
7
1
2
-
-
-
GND  
FB  
All voltage levels are measured with  
respect to this pin.  
Voltage Feedback Pin. Connecting this pin  
to an external resistor divider receives the  
feedback voltage of the regulator.  
4
2
3
Output pin of the regulator. Connecting  
this pin to load and output capacitors  
(10mF at least) is required for stability and  
improving transient response. The output  
voltage  
is  
programmed  
by  
the  
6
3,4  
1,2,3  
3,4,5  
1,2  
VOUT  
resistor-divider connected to FB pin. The  
VOUT can provide 3A (max.) load current  
to loads. During shutdown, the output  
voltage is quickly discharged by an  
internal pull-low MOSFET.  
Main supply input pin for voltage  
conversions.  
A
decoupling capacitor  
(³ 10mF recommended)  
is usually  
3
5
7,8,9  
6,7,8  
6,7  
VIN  
connected near this pin to filter the voltage  
noise and improve transient response.  
The voltage on this pin is monitored for  
Power-On-Reset purpose.  
Bias voltage input pin for internal control  
circuitry. Connect this pin to a voltage  
source (+5V recommende-  
4
1
6
7
10  
10  
8
4
VCNTL  
d). A decoupling capacitor (0.1mF typical)  
is usually connected near this pin to filter  
the voltage noise. The voltage at this pin is  
m onitored for Power-On-Reset purpose.  
Power-OK signal output pin. This pin is an  
open-drain output used to indicate the  
status of output voltage by sensing FB  
voltage. This pin is pulled low when output  
voltage is not within the Power-OK voltage  
window.  
5
1
POK  
Active-high enable control pin. Applying  
and holding the voltage on this pin below  
the enable voltage threshold shuts down  
the output. When re-enabled, the IC  
undergoes a new soft-start process. When  
leave this pin open, an internal pull-up/low  
2
8
6
-
9
-
5
-
EN  
current (3mA typical) pulls the EN voltage  
and enables/shuts down the regulator.  
5
-
NC  
GND  
-
No Connection.  
Ground pin of the circuitry. Connect the  
exposed pad to the system ground plan  
with large copper area for dissipating heat  
into the ambient air.  
Exposed Pad  
-
-
Exposed Pad Exposed Pad Exposed Pad  
Connect this pad to system VIN or ground  
plane for good thermal conductivity.  
Exposed Pad  
-
-
-
Copyright ã ANPEC Electronics Corp.  
7
www.anpec.com.tw  
Rev. A.6 - Apr., 2018  

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