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AN-5026

更新时间: 2024-11-13 22:05:43
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飞兆/仙童 - FAIRCHILD /
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8页 724K
描述
Using BGA Packages

AN-5026 数据手册

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Fairchild Semiconductor  
Application Note  
AN-5026  
January 2001  
Revised September 2001  
Using BGA Packages  
TABLE 1. BGA Space Savings  
Compared to Surface Mount Packages  
Introduction  
Demanding space and weight requirements of personal  
computing and portable electronic equipment has led to  
many innovations in IC packaging. Combining the right  
interface and logic products with new package technology  
can have a significant impact on the capabilities and form-  
factor of the end product. Leaded surface mount devices  
are constantly pushing the manufacturing capabilities of  
leading board manufacturers to finer and finer lead pitch  
geometry’s to increase I/O density and reduce board  
space.  
Number  
of Bits  
QVSOP  
TSSOP  
> 66%  
> 67%  
65.50%  
61%  
TVSOP  
> 47%  
61%  
BQSOP  
> 59%  
49%  
36 to 48  
32 to 40  
18 to 24  
16 to 20  
40%  
NA  
39%  
37%  
This requirement has lead to significant interest in the  
JEDEC (Joint Electron Device Engineering Council) regis-  
tered Fine-Pitch Ball Grid Array (FBGA) package. These  
packages are ideally suited to low cost, high volume appli-  
cations, where package size and performance is of major  
importance. Typical BGA applications include:  
1. Notebook computers  
2. Personal Digital Assistants (PDA’s)  
3. Mobile telephone handsets  
4. High density disk drives  
5. Camcorders  
6. Digital cameras  
BGA advantages compared to fine pitch QFP or TSSOP  
packages:  
1. BGAs are usually smaller.  
2. BGAs have larger pitch.  
3. BGAs have no fragile leads, that causes yield and  
rework problems.  
4. Board assembly yields are significantly improved.  
5. Board inspection can be reduced.  
6. BGAs have better thermal and electrical properties.  
7. In many applications, the use of BGA results in signifi-  
cant system level cost savings.  
FIGURE 1. 114 Ball BGA vs. Surface Mount  
Surface Mount vs. BGA  
At 0.4 to 0.5mm pin pitch, the race to finer surface mount  
lead pitches has hit several technical and economic walls.  
Manufacturing anything smaller will significantly impact  
PCB yield and push board costs above acceptable levels  
for the highly competitive and cost conscious electronics  
industry. Avoiding problems such as bent leads and solder  
bridging become significant manufacturing challenges.  
Additionally, electrical problems such as crosstalk become  
a major issue due to the length and close pitch of the leads  
on surface mount packages.  
Alternatively, BGA packaging uses relatively wide pad to  
padpitch rules and when coupled with existing PCB man-  
ufacturing processes result in high yields. The array”  
approach improves I/O density and reduces the board  
space consumed by the device. Table 1 and Figure 1 show  
examples of space savings of BGA over surface mount  
packages.  
© 2001 Fairchild Semiconductor Corporation  
AN500543  
www.fairchildsemi.com  

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