Fairchild Semiconductor
Application Note
AN-5031
January 2002
Revised January 2002
GTLP Power Configuration
Since the level of VT directly affects the VOH level there are
Introduction
In order to drive high performance backplanes, GTLP
devices require power. This power comes from three dis-
crete levels: device power VCC, termination voltage VT, and
advantages to adjusting VT. Observations to be made dur-
ing VT adjustment include:
1. Noise Margin Associated with VREF
threshold voltage VREF. Each of these power sources have
When VREF adjustment is not available similar results
can be accomplished by adjusting VT.
different needs both in terms of energy used and more
importantly, noise characteristics.
2. Power Consumption
This application note provides an analysis of a GTLP back-
plane from a power perspective. This application note will
provide insight into the appropriate power requirements
and configurations for a GTLP backplane at each of the
discrete levels.
As VT is increased, the current through the device in a
LOW state, IOL, will increase. This may be a concern if
minimizing power is a priority. The obvious trade-off to
lowering VT, thus lowering power consumption, is
potential noise margin violations.
Device Bias V
Datasheet specifications for GTLP devices list VCC as
It is not until a LOW bit is received that the connection is
made between the termination voltage and ground. The
effective LOW on the bus, labeled as VOL, is then the factor
CC
ranging from 3.15V to 3.45V, a variance of almost ±5%. In
order to meet all datasheet performance specifications, this
voltage range must be conformed to. Maintaining a level in
this range is relatively simple to do and is often generated
by a master supply, possibly a switching or linear regulator
in the backplane cage. The common problem is the dis-
tance between the cleanly filtered master supply output
and the GTLP device that it is powering. It is over this dis-
tance that a problem is most often introduced.
of a voltage division between the termination resistance
RT, and the On Resistance of the GTLP device RDSON
.
Figure 1 illustrates this.
When troubleshooting a device, it is imperative that the
VCC oscilloscope probe and ground be placed as close to
the device as possible. It is here that disturbances are
seen. Putting the device through the various configurations
that the device might encounter during operation is also
important. Clocking data in the AB direction while under
Multiple Outputs Switching (MOS) is perhaps a worse case
condition, but this can vary between applications. It can
also be beneficial to monitor the ground plane for noise.
There is often more than one VCC pin on GTLP devices to
FIGURE 1. GTLP Output Buffer Showing Device RDSON
better distribute power inside the device. Each of these
pins will be wired to the VCC plane of the PCB, but each pin
Devices with higher drive, 100mA versus 50mA, have a
lower RDSON, VOL calculation can vary between devices.
should also have its own bypass and or decoupling capaci-
tors as close as possible to the device. Depending on the
size and frequency of the disturbance, more than one size
and type of capacitor may be required.
The VOL calculation can also vary considerably with tem-
perature. Each GTLP device has its own VOL vs. IOL plot
across temperature that can be used to calculate RDSON. It
is important to note that two devices capable of driving
100mA do not necessarily have the same RDSON due to
How much noise is acceptable? Of the three voltage levels
that GTLP devices require, VCC has the greatest amount of
slight design differences. Always consult the datasheet or
extended characterization for specific values.
noise tolerance. However, a VCC spike of relative magni-
tude can be seen on the edge rate integrity of the device
outputs. It is at this point that noise reduction measures
should be taken such as including a local voltage regulator.
A common question regarding open drain technologies is
“what is required of the voltage source VT and what are
possible configurations for it?” It is evident that large
amounts of current can be demanded from VT based on
Termination Voltage V
Due to the open drain technology used in GTLP output
buffers, a pull-up voltage level known as VT, nominally
1.5V, is required. When a GTLP device receives a HIGH on
the TTL input, it simply turns the output buffer OFF allowing
the voltage level of the trace, labeled as VOH, to be equal
T
the number of bits switching on the backplane and the
value of RT. But keep in mind that since the level of VT sets
VOH, any drops in the voltage level of VT will result in a
degradation of the upper noise margin, the distance
between VOH and VREF
.
to the termination voltage.
© 2002 Fairchild Semiconductor Corporation
AN500725
www.fairchildsemi.com
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