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AN504

更新时间: 2024-11-14 03:18:47
品牌 Logo 应用领域
威世 - VISHAY 光电开关
页数 文件大小 规格书
12页 153K
描述
Video Crosspoint Switch Simplifies Large Matrix Designs

AN504 数据手册

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AN504  
Vishay Siliconix  
Video Crosspoint Switch Simplifies Large Matrix Designs  
The DG884 is a digitally selectable eight-input to four-output  
monolithic bidirectional crosspoint IC suitable for wideband  
analog and digital signal routing. Wideband here is used to  
define signals with bandwidths in the range of 60 to 200 MHz.  
Fabricated with the Vishay Siliconix D/CMOS technology, the  
DG884 incorporates n-channel DMOS switching FETs with  
low-power CMOS control logic, drivers, and latches. The  
low-capacitance DMOS FETs are connected as low  
on-resistance T-switches to achieve high levels of off-isolation  
and low levels of crosstalk. On-chip TTL-compatible address  
latches and data readback are included to simplify  
microprocessor interfacing. Double buffering of the switch  
addressing allows update information to be loaded without  
affecting the existing state of the crosspoint. A single SALVO  
command is all that is required to transfer previously set  
information to the current event latches. This single command  
significantly speeds up the setup time, especially in large  
matrices requiring more than one DG884.  
The Signal Path  
The internal function blocks of the DG884 are shown in  
Figure 1, and the signal path from one input to one output is  
shown in Figure 2. The signal path is composed of a T-switch  
at the matrix and an additional low-resistance switch in series  
with each output. The T-switch connection maximizes the  
off-isolation by shunting to ground any signal that feeds  
through the small series capacitances of the off series  
switches. The series output switches offer a number of  
advantages, namely:  
D They provide an extra stage of isolation at the output  
D They reduce the off-state output capacitance, which is  
necessary when other DG884 outputs are connected in  
parallel.  
D They reduce the off-output leakage.  
IN IN IN IN IN IN IN IN  
8
1
2
3
4
5
6
7
OUT  
OUT  
OUT  
OUT  
1
2
3
4
Signal Path Input to Output  
8 x 4 Switch Matrix  
SW1  
SW2  
SW4  
Input  
1 of 8  
Output  
1 of 4  
SW3  
4 Disable Outputs  
(Quad Package  
Only)  
Decode Logic, Switch Drivers  
Current Event Latches  
Next Event Latches  
From Input 2 of 8  
From Input 8 of 8  
RS  
WR  
CS  
SALVO  
I/O Control  
Logic  
B
1
B
0
MUX Common  
Typical on-resistances at 25_C:  
SW1 = SW2 = 20 W  
SW3 = 200 W  
SW4 = 10 W  
I/O A  
A
2
A A  
1 0  
3
FIGURE 1. DG884 Block Diagram  
FIGURE 2. DG884 Signal Path  
Document Number: 70610  
05-Aug-99  
www.vishay.com S FaxBack 408-970-5600  
6-1  

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