AMIS−52150
CREF, Current Reference Bias Pin
CLKOUT, Internal Clock Output Pin
A resistor must be connected to the CREF pin to provide
a current bias to the internal bandgap voltage reference
circuit. It is critical that this resistor value is 33.2 kW (with
one percent or better tolerance) to achieve proper operation
of the bandgap voltage reference.
The CLKOUT pin is an output for the RC oscillator,
crystal oscillator signal or the recovered data clock,
respectively. The crystal oscillator signal output can be
divided by 2, 3 or 4. The pin can also be programmed to
output the signal from the recovered data clock function. For
more information about the clock and data recovery (CDR)
function of the AMIS−52150, refer to the section of this
document on clock and data recovery.
GND, Ground Pin
The GND pin is the ground connection for the digital and
analog circuits.
The CLKOUT pin function control registers are shown in
Table 8.
Table 8. OSCILLATOR OUTPUT CONTROL REGISTERS
CLKOUT Pin Definition Control Registers
Bits States
Register (HEX)
Name
Comments
CLKOUT is Enabled
0x0c
CLKOUT Enable
7
0
1
CLKOUT is Disabled
Automatic Control
RC OSC
0x0d
0x0e
CLKOUT Select
XTAL Divide
4, 5
0, 1
00
01
10
11
00
01
10
11
Xtal
Off
Divide by 4
Divide by 3
Divide by 2
Divide by 1
X1, X2, External Crystal Reference Pins
X1 and X2 pins connect a parallel resonance oscillator
crystal to the AMIS−52150 internal oscillator circuit. The
external crystal should meet the requirements as listed in
Table 9. However, the two load capacitors should be sized
slightly smaller than the recommended value for the crystal,
because of the added capacitance due to the internal trim
circuit. The crystal parameters are shown in Table 9.
Table 9. EXTERNAL CRYSTAL PARAMETERS
Parameter
Crystal Frequency
Min
12.56
9.375
10.9
−
Typ
−
Max
12.65
24.0
14.0
70
Unit
Conditions
MHz
Targeted
−
Non-quick Start
Quick Start
−
Crystal ESR
−
W
Crystal Tolerance
Load Capacitance
−
10
−
ppm
Load Capacitors should be Smaller than Recommended for the Crystal to allow for Frequency Tuning
I2CDATA, I2CCLK, I2C Control Interface Bus Pins
2
The AMIS−52150 implements an I C serial 8-bit
400 kbits/second) data modes. The interface conforms to the
Phillips specification for the I C bus standard. The pins have
internal pull-up resistors. See Table 10 and Table 11 for
some parameters of this interface.
2
2
bi-directional interface with the pins I CDATA and
I CCLK. The device implements the protocol for a slave
device. The clock for the interface is generated by the
external master device. The interface will support the
2
In addition, Table 12 shows the details of register that
2
normal (0
–
100 kbits/second) or the fast (0
–
controls the I C address increment function.
Table 10. INTERNAL I2C PULL-UP RESISTORS
Pin
Function
Typ
15
Unit
kW
2
I CDATA
Internal Pull-up R
Internal Pull-up R
2
I CCLK
15
kW
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