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AMIS-30532 PDF预览

AMIS-30532

更新时间: 2022-12-17 01:39:26
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器电机
页数 文件大小 规格书
29页 564K
描述
Micro-Stepping Motor Driver

AMIS-30532 数据手册

 浏览型号AMIS-30532的Datasheet PDF文件第20页浏览型号AMIS-30532的Datasheet PDF文件第21页浏览型号AMIS-30532的Datasheet PDF文件第22页浏览型号AMIS-30532的Datasheet PDF文件第24页浏览型号AMIS-30532的Datasheet PDF文件第25页浏览型号AMIS-30532的Datasheet PDF文件第26页 
AMIS--30532  
The NEW DATA is written into the corresponding  
internal register at the rising edge of CS  
CS  
DI  
COMMAND  
DATA  
NEW DATA for ADDR 3  
WRITE DATA to ADDR 3  
DATA from previous command or  
NOT VALID after POR or RESET  
DATA  
DATA  
DO  
OLD DATA or NOT VALID  
OLD DATA from ADDR 3  
Figure 21. Single WRITE Operation where DATA from the Master is written in SPI register with Address 3  
Examples of Combined READ and WRITE  
Operations  
In the following examples successive READ and WRITE  
operations are combined. In Figure 22 the Master first reads  
the status from Register at ADDR4 and at ADDR5 followed  
by writing a control byte in Control Register at ADDR2.  
Note that during the write command the old data of the  
pointed register is returned at the moment the new data is  
shifted in.  
Registers are updated with the internal  
status at the rising edge of the internal  
AMIS--30532 clock when CS = 1  
The NEW DATA is written into the  
correspondinginternal register at  
the rising edge of CS  
CS  
COMMAND  
DATA  
COMMAND  
COMMAND  
WRITE DATA  
to ADDR 2  
READ DATA  
from ADDR4  
READ DATA  
from ADDR5  
NEW DATA  
for ADDR2  
DI  
DATA from previous  
command or NOT VALID  
after POR or RESET  
DATA  
DATA  
DATA  
DATA  
DATA  
from ADDR4  
OLD DATA  
from ADDR2  
OLD DATA  
or NOT VALID  
DATA  
from ADDR5  
DO  
Figure 22. 2 Successive READ Commands Followed by a WRITE Command  
After the write operation the Master could initiate a read  
back command in order to verify the data correctly written  
as illustrated in Figure 23. During reception of the READ  
command the old data is returned for a second time. Only  
after receiving the READ command the new data is  
transmitted. This rule also applies when the master device  
wants to initiate an SPI transfer to read the Status Registers.  
Because the internal system clock updates the Status  
Registers only when CS line is high, the first read out byte  
might represent old status information.  
http://onsemi.com  
23  

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