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AMIS-30532 PDF预览

AMIS-30532

更新时间: 2022-12-17 01:39:26
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器电机
页数 文件大小 规格书
29页 564K
描述
Micro-Stepping Motor Driver

AMIS-30532 数据手册

 浏览型号AMIS-30532的Datasheet PDF文件第23页浏览型号AMIS-30532的Datasheet PDF文件第24页浏览型号AMIS-30532的Datasheet PDF文件第25页浏览型号AMIS-30532的Datasheet PDF文件第27页浏览型号AMIS-30532的Datasheet PDF文件第28页浏览型号AMIS-30532的Datasheet PDF文件第29页 
AMIS--30532  
CUR[4:0]  
Selects IMCmax peak. This is the peak or amplitude of the regulated current waveform in the motor coils.  
Table 15. SPI CONTROL PARAMETER OVERVIEW CUR[4:0]  
Current Range  
Index  
Current (mA)  
Current Range  
Index  
Current (mA)  
(Note 18)  
CUR[4:0]  
(Note 17)  
(Note 18)  
CUR[4:0]  
(Note 17)  
0
1
00000  
66  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
10000  
735  
800  
00001  
00010  
00011  
00100  
00101  
00110  
00111  
01000  
01001  
01010  
01011  
01100  
01101  
01110  
01111  
135  
189  
200  
221  
244  
269  
297  
328  
366  
400  
442  
488  
538  
594  
654  
10001  
10010  
10011  
10100  
10101  
10110  
10111  
11000  
11001  
11010  
11011  
11100  
11101  
11110  
11111  
2
883  
3
975  
2
4
1077  
1189  
1255  
1485  
1625  
1767  
1950  
2153  
2378  
2552  
2775  
3015  
0
5
6
7
8
9
10  
11  
12  
13  
14  
15  
3
1
17.Typical current amplitude at T = 125°C  
J
18.Reducing the current over different current ranges might trigger overcurrent detection. See dedicated application note for solutions  
SPI Status Register Description  
All 4 SPI status registers have Read Access and are default to ”0” after power--on or hard reset.  
Table 16. SPI STATUS REGISTERS  
Structure  
Bit 7  
R
Bit 6  
R
Bit 5  
R
Bit 4  
R
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Content  
Access  
Reset  
R
0
R
0
R
0
--  
R
0
--  
0
0
0
0
Address  
SR0 (04h)  
Data is not  
latched  
PAR  
TW  
CPfail  
WD  
OPENX  
OPENY  
SR1 (05h)  
SR2 (06h)  
SR3 (07h)  
Data is  
latched  
PAR  
PAR  
PAR  
OVCXPT  
OVCYPT  
OVCXPB  
OVCYPB  
OVCXNT  
OVCXNB  
OVCYNB  
MSP[6:0]  
--  
--  
--  
--  
--  
Data is  
latched  
OVCYYNT  
TSD  
Data is not  
latched  
Where:  
R
Read only mode access  
Reset  
PAR  
Status after power--on or hard reset  
Parity check  
http://onsemi.com  
26  

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