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AM29DS323DT120WHK PDF预览

AM29DS323DT120WHK

更新时间: 2024-11-20 03:14:11
品牌 Logo 应用领域
飞索 - SPANSION /
页数 文件大小 规格书
51页 931K
描述
Flash, 4MX8, 120ns, PBGA48, 6 X 12 MM, 0.80 MM PITCH, FBGA-48

AM29DS323DT120WHK 数据手册

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ADVANCE INFORMATION  
Am29DS323D  
32 Megabit (4 M x 8-Bit/2 M x 16-Bit)  
CMOS 1.8 Volt-only, Simultaneous Operation Flash Memory  
DISTINCTIVE CHARACTERISTICS  
ARCHITECTURAL ADVANTAGES  
Minimum 1 million write cycles guaranteed per sector  
Simultaneous Read/Write operations  
20 Year data retention at 125°C  
— Data can be continuously read from one bank while  
executing erase/program functions in other bank  
— Reliable operation for the life of the system  
SOFTWARE FEATURES  
— Zero latency between read and write operations  
Data Management Software (DMS)  
Multiple bank architectures  
— AMD-supplied software manages data programming  
and erasing, enabling EEPROM emulation  
Two devices available with different bank sizes (refer  
to Table 3)  
— Eases sector erase limitations  
Secured Silicon (SecSi) Sector: Extra 64 KByte sector  
Supports Common Flash Memory Interface (CFI)  
Factory locked and identifiable: 16 bytes available for  
secure, random factory Electronic Serial Number;  
verifiable as factory locked through autoselect  
function. ExpressFlash option allows entire sector to  
be available for factory-secured data  
Erase Suspend/Erase Resume  
— Suspends erase operations to allow programming in  
same bank  
Data# Polling and Toggle Bits  
— Provides a software method of detecting the status of  
program or erase cycles  
Customer lockable: Can be read, programmed, or  
erased just like other sectors. Once locked, data  
cannot be changed  
Unlock Bypass Program command  
— Reduces overall programming time when issuing  
multiple program command sequences  
Zero Power Operation  
— Sophisticated power management circuits reduce  
power consumed during inactive periods to nearly  
zero  
HARDWARE FEATURES  
Any combination of sectors can be erased  
Package options  
— 48-ball FBGA  
Ready/Busy# output (RY/BY#)  
— Hardware method for detecting program or erase  
cycle completion  
— 48-pin TSOP (contact AMD for availability)  
Top or bottom boot block  
Hardware reset pin (RESET#)  
Manufactured on 0.23 µm process technology  
Compatible with JEDEC standards  
— Hardware method of resetting the internal state  
machine to reading array data  
— Pinout and software compatible with  
single-power-supply flash standard  
WP#/ACC input pin  
— Write protect (WP#) function allows protection of two  
outermost boot sectors, regardless of sector protect status  
PERFORMANCE CHARACTERISTICS  
— Acceleration (ACC) function provides accelerated  
program times  
High performance  
— Access time as fast 100 ns  
Sector protection  
— Program time: 14 µs/word typical utilizing  
Accelerate function  
— Hardware method of locking a sector, either  
in-system or using programming equipment, to  
prevent any program or erase operation within that  
sector  
Ultra low power consumption (typical values)  
— 1 mA active read current at 1 MHz  
— 5 mA active read current at 5 MHz  
Temporary Sector Unprotect allows changing data in  
protected sectors in-system  
— 200 nA in standby or automatic sleep mode  
Publication# 23480 Rev: A Amendment/0  
Issue Date: January 25, 2000  
This document contains information on a product under development at Advanced Micro Devices. The information  
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed  
product without notice.  
Refer to AMD’s Website (www.amd.com) for the latest information.  

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