Datasheet > AEIC-7272-S16

AEIC-7272-S16

更新时间： 2024-09-17 12:52:55

品牌	Logo	应用领域
安华高科 - AVAGO		驱动器
页数	文件大小	规格书
3页	55K
描述
Quad Diff erential Line Driver Separate Logic Bias and Driver Bias With Tri-State Outputs

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AEIC-7272-S16 数据手册

AEIC-7272-S16

Quad Diﬀerential Line Driver

Separate Logic Bias and Driver Bias

With Tri-State Outputs

Data Sheet

Description

Features

These line drivers are pin compatible with 26LS31 in ap-  Supply (Bias) Voltage Range 3.5 V to 30 V

plications where pin 4 = 5V and pin 12 = GND. Internal

clamp diodes allow trouble-free operation when driving

cable lengths exceeding 100m. Split supplies are provided

 Operation to 800 KHz

 CMOS and TTL Compatible Inputs

to minimize standby power dissipation in high voltage ap-  Separate logic bias and driver supply pins

plications. The logic should be powered from a regulated

5V supply at the VccBias pin. The output stages may then

be powered by a separate supply at VccDrivers, up to 30V.

Output voltage swings of 0.3V to VCC-1.9V are typical. The

 Optional single supply operation for moderate power

applications

 High Impedance Buﬀered Inputs with hysteresis

outputs are protected against shorts to ground, shorts to

Vcc and to other outputs, by a two-fold scheme of current

limiting and thermal shutdown.This assures highly reliable

operation in harsh environments.

 Tri-State outputs

 80 mA peak SINK/SOURCE current

Pin Assignment

This part is available in 16L SOIC (Pb-free) package.

A_IN

A+

16 Vcc Drivers

15 D_IN

Applications

 Encoders

 Industrial controls

A-

14 D+

V_REG

Vcc Bias

B-

13 D-

12 EN-

11 C-

B+

B_IN

10 C+

GND

C_IN

12 3

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