ADuM5210/ADuM5211/ADuM5212
Data Sheet
Failure to ensure this can cause voltage differentials between pins,
exceeding the absolute maximum ratings specified in Table 19,
thereby leading to latch-up and/or permanent damage.
logic transitions at the input for more than 1.6 µs, periodic sets
of refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses of more than approximately 6.4 µs, the input side
is assumed to be unpowered or nonfunctional, in which case,
the isolator output is forced to a default low state by the watchdog
timer circuit. This situation should occur in the ADuM5210/
ADuM5211/ADuM5212 only during power-up and power-
down operations.
THERMAL ANALYSIS
The ADuM5210/ADuM5211/ADuM5212 consist of four internal
die attached to a split lead frame with two die attach paddles. For
the purposes of thermal analysis, the chip is treated as a thermal
unit, with the highest junction temperature reflected in the θJA from
Table 14. The value of θJA is based on measurements taken with the
parts mounted on a JEDEC standard, 4-layer board with fine
width traces and still air. Under normal operating conditions, the
ADuM5210/ADuM5211/ADuM5212 can operate at full load
across the full temperature range without derating the output current.
The limitation on the ADuM5210/ADuM5211/ADuM5212
magnetic field immunity is set by the condition in which induced
voltage in the transformer receiving coil is sufficiently large to either
falsely set or reset the decoder. The following analysis defines
the conditions under which this can occur. The 3.3 V operating
condition of the ADuM5210/ADuM5211/ADuM5212 is examined
because it represents the most susceptible mode of operation.
PROPAGATION DELAY PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component (see Figure 27).
The propagation delay to a logic low output may differ from the
propagation delay to a logic high.
The pulses at the transformer output have an amplitude of >1.5 V.
The decoder has a sensing threshold of about 0.5 V, thus estab-
lishing a 0.5 V margin in which induced voltages can be tolerated.
The voltage induced across the receiving coil is given by
INPUT (V
)
50%
Ix
2
V = (−dβ/dt)∑πrn ; n = 1, 2, … , N
tPLH
tPHL
where:
OUTPUT (V
)
50%
Ox
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
Figure 27. Propagation Delay Parameters
Pulse width distortion is the maximum difference between these
two propagation delay values and is an indication of how
accurately the input signal timing is preserved.
Given the geometry of the receiving coil in the ADuM5210/
ADuM5211/ADuM5212 and an imposed requirement that
the induced voltage be, at most, 50% of the 0.5 V margin at the
decoder, a maximum allowable magnetic field is calculated as
shown in Figure 28.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
ADuM5210/ADuM5211/ADuM5212 component.
100
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM5210/
ADuM5211/ADuM5212 devices operating under the same
conditions.
10
1
EMI CONSIDERATIONS
The dc-to-dc converter section of the ADuM5210/ADuM5211/
ADuM5212 components must, of necessity, operate at a very high
frequency to allow efficient power transfer through the small
transformers. This creates high frequency currents that can
propagate in circuit board ground and power planes, causing
edge and dipole radiation. Grounded enclosures are recom-
mended for applications that use these devices. If grounded
enclosures are not possible, follow good RF design practices
in the layout of the PCB. See the AN-0971 Application Note
for the most current PCB layout recommendations for the
ADuM5210/ADuM5211/ADuM5212.
0.1
0.01
0.001
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
Figure 28. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse
(and is of the worst-case polarity), it reduces the received pulse
from >1.0 V to 0.75 V, which is still well above the 0.5 V sensing
threshold of the decoder.
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
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