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ADUC7128

更新时间: 2024-11-27 04:04:47
品牌 Logo 应用领域
亚德诺 - ADI 微控制器数据分配系统
页数 文件大小 规格书
92页 744K
描述
Precision Analog Microcontroller ARM7TDMI MCU with 12-bit ADC & DDS DAC

ADUC7128 数据手册

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Precision Analog Microcontroller  
ARM7TDMI® MCU with 12-bit ADC & DDS DAC  
Preliminary Technical Data  
ADuC7128  
Memory  
FEATURES  
Analog I/O  
Multi-Channel, 12-bit, 1MSPS ADC  
- 10 ADC channels  
- Fully differential and single-ended modes  
- 0 to VREF Analog Input Range  
10-bit DAC  
126k Bytes Flash/EE Memory, 8k Bytes SRAM  
In-Circuit Download, JTAG based Debug  
Software triggered in-circuit re-programmability  
On-Chip Peripherals  
2 x UART, 2 x I2C® and SPI Serial I/O  
28-Pin GPIO Port  
5 X General Purpose Timers  
Wake-up and Watchdog Timers  
Power Supply Monitor  
- 32-bit 21MHz DDS  
- Current-to-Voltage (I/V) Conversion  
- Integrated 2nd order LPF  
16-bit PWM generator  
Quadrature Encoder  
- DDS Input to DAC  
PLA – Programmable Logic (Array)  
Power  
- 100ohm Line Driver  
On-Chip Voltage Reference  
Specified for 3V operation  
Active Mode: 11mA (@5MHz)  
45mA (@41.78 MHz)  
On-Chip Temperature Sensor ( 3ꢀC)  
Uncommitted Voltage Comparator  
Microcontroller  
Packages and Temperature Range  
64 lead LFCSP (9mm x 9mm) package –40ꢀC to 85ꢀC  
Tools  
Low-Cost QuickStart Development System  
Full Third-Party Support  
ARM7TDMI Core, 16/32-bit RISC architecture  
JTAG Port supports code download and debug  
External Watch crystal/ Clock Source  
- 41.78 MHz PLL with 8 way Programmable Divider  
- Optional Trimmed On-Chip Oscillator  
FUNCTIONAL BLOCK DIAGRAM  
ADC0  
12-BIT SAR  
ADC 1MSPS  
MUX  
T/H  
VDAC  
LD1TX  
10-BIT  
IOUT DAC  
TEMP  
SENSOR  
DDS  
I/V  
LD2TX  
+
CMP0  
CMP1  
-
BAND GAP  
REFERENCE  
CMPOUT  
ADuC7128  
VREF  
PWM1  
PWM2  
PWM3  
PWM4  
PWM5  
PWM6  
ARM7TDMI - BASED MCU  
WITH ADDITIONAL PERIPHERALS  
PWM  
5 GEN PURPOSE  
2 KBYTES  
TIMERS  
RST  
POR  
OSC/PLL  
PSM  
8192 BYTES  
SRAM  
64 KBYTES  
FLASH/EE  
62 KBYTES  
FLASH/EE  
WAKE-UP/  
RTC TIMER  
XCLKI  
XCLKO  
XCLK  
INTERRUPT  
CONTROLLER  
(2k x 32 bits)  
(31k x 16 bits)  
(32k x 16 bits)  
S1  
S2  
Quad  
Encoder  
GPIO  
CONTROL  
I2C  
UART0 UART1  
JTAG  
PLA  
SPI  
. . .  
JTAG  
. . .  
. . .  
. . .  
. . .  
Figure 1. Basic Block Diagram  
Rev. PrA  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2006 Analog Devices, Inc. All rights reserved.  

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