Precision Analog Microcontroller, 12-Bit
Analog Input/Output, ARM7TDMI MCU
ADuC7120/ADuC7121
Data Sheet
Memory
FEATURES
126 kB Flash/EE memory, 8 kB SRAM
In-circuit download, JTAG-based debug
Software triggered in-circuit reprogrammability
On-chip peripherals
UART, 2 × I2C and SPI serial I/O
32-pin GPIO port
4× general-purpose timers
Wake-up timers and WDT
Power supply monitor
Analog input/output
Multiple channel, 12-bit, 1 MSPS ADC
2 differential pairs with input PGA
General-purpose inputs (differential or single-ended)
ADuC7120: 11 channels
ADuC7121: 7 channels
Fully differential and single-ended modes
0 V to VREF analog input voltage range (single-ended mode)
5 low noise IDACs
250 mA, 200 mA, 45 mA, 80 mA, 20 mA
12-bit voltage output DACs
IDAC monitor
Temperature monitor
Vectored interrupt controller for FIQ and IRQ
8 priority levels for each interrupt type
Interrupt on edge or level external pin inputs
Power
ADuC7120: 12 channels
ADuC7121: 4 channels
4× 12-bit voltage output DACs
On-chip voltage reference
Specified for 3 V operation
Normal mode: 11 mA at 5.22 MHz, 30 mA at 41.78 MHz
Packages and temperature range
7 mm × 7 mm 108-ball CSP_BGA
Fully specified for –40°C to +105°C operation
Tools
On-chip temperature sensor
Microcontroller
ARM7TDMI core, 16-bit/32-bit RISC architecture
JTAG port supports code download and debug
Clocking options
Trimmed on-chip oscillator ( 3ꢀ)
External watch crystal
Low cost QuickStart development system
Full third party support
External clock source up to 41.78 MHz
41.78 MHz PLL with programmable divider
APPLICATIONS
Optical modules—tunable laser
FUNCTIONAL BLOCK DIAGRAM
AVDD 3.3V
AGND
IDAC0 IDAC1 IDAC2 IDAC3 IDAC4
DAC
DAC
BUF
BUF
DAC0
ADuC7120: 12 CHANNELS
ADuC7121: 4 CHANNELS
DAC11
PADC0N
PADC0P
PGA
ADuC7120/
ADuC7121
PLA
PADC1N
PADC1P
PGA
OSC
PLL
POR
PWM
1MSPS
12-BIT
SAR ADC
ADC0
ADC1
8kB SRAM
3× GP
WAKE-UP
TIMER
IOVDD
IOGND
(2k × 32-BIT)
TIMERS
LDO
126kB
FLASH
(63k ×
WDT
VIC
ARM7
TDMI
XTALI
XTALO
RST
ADC9
UART
16-BIT)
ADC10/AINCM
GPIO
CONTROL
2
TEMPERATURE
SENSOR
TDO
TDI
JTAG
SPI
I C × 2
TCK
TMS
TRST
INTERNAL
REFERENCE
BUF
V
_1.2
V
_2.5
REF
REF
P0.0 TO P0.7
P1.0 TO P1.7
P2.0 TO P2.7
P3.0 TO P3.7
Figure 1.
Rev. D
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