Datasheet > ADSPBF537SKBC1Z600

ADSPBF537SKBC1Z600

更新时间： 2024-11-24 21:00:59

品牌	Logo	应用领域
亚德诺 - ADI		时钟外围集成电路
页数	文件大小	规格书
64页	2046K
描述
IC 16-BIT, 40 MHz, OTHER DSP, PBGA182, LEAD FREE, MO-205AE, MBGA-182, Digital Signal Processor

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Blackfin^®

Embedded Processor

Preliminary Technical Data

ADSP-BF536/ADSP-BF537

Two Dual-Channel Memory DMA Controllers

FEATURES

Memory Management Unit Providing Memory Protection

Up to 600 MHz High-Performance Blackfin Processor

Two 16-Bit MACs, Two 40-Bit ALUs, Four 8-Bit Video

ALUs, 40-Bit Shifter

RISC-Like Register and Instruction Model for Ease of

Programming and Compiler-Friendly Support

Advanced Debug, Trace, and Performance-Monitoring

0.8 V to 1.2 V Core V_DDwith On-chip Voltage Regulation

2.5 V and 3.3 V-Tolerant I/O with Specific 5 V-Tolerant Pins

182-Ball MBGA and 208-Ball Sparse MBGA Packages

Lead Bearing and Lead Free Package Choices

PERIPHERALS

IEEE 802.3-Compliant 10/100 Ethernet MAC

Controller Area Network (CAN) 2.0B Interface

Parallel Peripheral Interface (PPI), Supporting ITU-R 656

Video Data Formats

Two Dual-Channel, Full-Duplex Synchronous Serial Ports

(SPORTs), Supporting Eight Stereo I²S Channels

12 Peripheral DMAs, 2 Mastered by the Ethernet MAC

Two Memory-to-Memory DMAs With External Request Lines

Event Handler With 32 Interrupt Inputs

MEMORY

Serial Peripheral Interface (SPI)-Compatible

Two UARTs with IrDA® Support

Two-Wire Interface (TWI) Controller

Eight 32-Bit Timer/Counters with PWM Support

Real-Time Clock (RTC) and Watchdog Timer

32-Bit Core Timer

48 General-Purpose I/Os (GPIOs), 8 with High Current Drivers

On-Chip PLL Capable of 1x to 63x Frequency Multiplication

Debug/JTAG Interface

Up to 132K Bytes of On-Chip Memory:

16K Bytes of Instruction SRAM/Cache

48K Bytes of Instruction SRAM

32K Bytes of Data SRAM/Cache

32K Bytes of Data SRAM

4K Bytes of Scratchpad SRAM

External Memory Controller with Glueless Support for

SDRAM and Asynchronous 8/16-Bit Memories

Flexible Booting Options from External Flash, SPI and TWI

Memory or from SPI, TWI, and UART Host Devices

EVENT

CONTROLLER/

CORE TIMER

JTAG TEST AND

EMULATION

WATCHDOG TIMER

RTC

GPIO

PORT

ETHERNET MAC

VOLTAGE

REGULATOR

CAN

PORT

TWI

MMU

INSTRUCTION

DATA

SPORT0

MEMORY

SPORT1

GPIO

CORE / SYSTEM BUS INTERFACE

PORT

PPI

UART 0-1

DMA

GPIO

PORT

CONTROLLER

SPI

TIMERS 0-7

BOOT ROM

EXTERNAL PORT

FLASH, SDRAM

CONTROL

Figure 1. Functional Block Diagram

Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.

Rev. PrD

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel:781/329-4700

Fax:781/326-8703

www.analog.com

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与ADSPBF537SKBC1Z600相关器件

型号	品牌	获取价格	描述	数据表
ADSPBF537SKBC2Z600	ADI	获取价格	IC 16-BIT, 40 MHz, OTHER DSP, PBGA208, LEAD FREE, MO-205AM, MBGA-208, Digital Signal Proce
ADSP-BF538	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF538_07	ADI	获取价格	Blackfin㈢ Embedded Processor
ADSP-BF538_08	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF538_15	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF538BBCZ-4A	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF538BBCZ-4F4	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF538BBCZ-4F8	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF538BBCZ-5A	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF538BBCZ-5F4	ADI	获取价格	Blackfin Embedded Processor

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