Datasheet > ADSP-BF539_15

ADSP-BF539_15

更新时间： 2024-11-28 01:20:47

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
60页	2472K
描述
Blackfin Embedded Processor

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ADSP-BF539_15 数据手册

Blackfin

Embedded Processor

ADSP-BF539/ADSP-BF539F

External memory controller with glueless support

for SDRAM, SRAM, flash, and ROM

Flexible memory booting options from SPI and external

memory

FEATURES

Up to 533 MHz high performance Blackfin processor

Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,

40-bit shifter

PERIPHERALS

RISC-like register and instruction model for ease of

programming and compiler friendly support

Advanced debug, trace, and performance monitoring

Wide range of operating voltages; see Operating Conditions

on Page 26

Parallel peripheral interface (PPI), supporting ITU-R 656

video data formats

4 dual-channel, full-duplex synchronous serial ports,

supporting 16 stereo I²S channels

Qualified for automotive applications

Programmable on-chip voltage regulator

316-ball Pb-free CSP_BGA package

2 DMA controllers supporting 26 peripheral DMAs

4 memory-to-memory DMAs

Controller area network (CAN) 2.0B controller

Media transceiver (MXVR) for connection

to a MOST network

3 SPI-compatible ports

Three 32-bit timer/counters with PWM support

3 UARTs with support for IrDA

2 TWI controllers compatible with I²C industry standard

Up to 38 general-purpose I/O pins (GPIO)

Up to 16 general-purpose flag pins (GPF)

Real-time clock, watchdog timer, and 32-bit core timer

On-chip PLL capable of frequency multiplication

Debug/JTAG interface

MEMORY

148K bytes of on-chip memory

16K bytes of instruction SRAM/cache

64K bytes of instruction SRAM

32K bytes of data SRAM

32K bytes of data SRAM/cache

4K bytes of scratchpad SRAM

Optional 8M bit parallel flash with boot option

Memory management unit providing memory protection

JTAG TEST AND EMULATION

VOLTAGE REGULATOR

PERIPHERAL ACCESS BUS

TWI0-1

INTERRUPT

WATCHDOG

CONTROLLER

TIMER

CAN 2.0B

GPIO

PORT

DMA CORE

BUS 2

RTC

PPI

MXVR

SPI1-2

L1 INSTRUCTION

MEMORY

L1 DATA

MEMORY

DMA

CONTROLLER1

DMA

CONTROLLER 0

GPIO

PORT

GPIO

PORT

TIMER0-2

SPI0

DMA

EXTERNAL

BUS 0

UART1-2

SPORT2-3

DMA CORE

BUS 1

DMA

EXTERNAL

BUS 1

DMA CORE BUS 0

GPIO

PORT

UART0

EXTERNAL PORT

FLASH, SDRAM CONTROL

SPORT0-1

8M BIT PARALLEL FLASH

(See Table 1)

BOOT ROM

Figure 1. Functional Block Diagram

Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.

Rev. F Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel: 781.329.4700

Technical Support

www.analog.com

12 3 4 5 6 7...60

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与ADSP-BF539_15相关器件

型号	品牌	获取价格	描述	数据表
ADSP-BF539BBCZ-5A	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539BBCZ-5F4	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539BBCZ-5F8	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539F	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539F_15	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539WBBCZ-5A	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539WBBCZ5F4	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539WBBCZ5F8	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539WYBCZ-4A	ADI	获取价格	Blackfin Embedded Processor
ADSP-BF539WYBCZ4F4	ADI	获取价格	Blackfin Embedded Processor

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