5秒后页面跳转
ADSP-2185LBST-115 PDF预览

ADSP-2185LBST-115

更新时间: 2024-11-04 22:39:39
品牌 Logo 应用领域
亚德诺 - ADI 电脑
页数 文件大小 规格书
31页 224K
描述
DSP Microcomputer

ADSP-2185LBST-115 数据手册

 浏览型号ADSP-2185LBST-115的Datasheet PDF文件第2页浏览型号ADSP-2185LBST-115的Datasheet PDF文件第3页浏览型号ADSP-2185LBST-115的Datasheet PDF文件第4页浏览型号ADSP-2185LBST-115的Datasheet PDF文件第5页浏览型号ADSP-2185LBST-115的Datasheet PDF文件第6页浏览型号ADSP-2185LBST-115的Datasheet PDF文件第7页 
a
DSP Microcomputer  
ADSP-2185L  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
PERFORMANCE  
19 ns Instruction Cycle Time @ 3.3 Volts, 52 MIPS  
Sustained Performance  
Single-Cycle Instruction Execution  
Single-Cycle Context Switch  
POWER-DOWN  
CONTROL  
FULL MEMORY  
MODE  
MEMORY  
DATA ADDRESS  
GENERATORS  
PROGRAMMABLE  
EXTERNAL  
ADDRESS  
BUS  
PROGRAM  
SEQUENCER  
16K
؋
24 PM  
8K
؋
24 OVERLAY 1  
16K
؋
16 DM  
I/O  
AND  
FLAGS  
8K
؋
16 OVERLAY 1  
8K
؋
16 OVERLAY 2  
(
)
(
8K
؋
24 OVERLAY 2  
DAG 2  
DAG 1  
)
EXTERNAL  
DATA  
3-Bus Architecture Allows Dual Operand Fetches in  
Every Instruction Cycle  
Multifunction Instructions  
PROGRAM MEMORY ADDRESS  
DATA MEMORY ADDRESS  
BUS  
BYTE DMA  
CONTROLLER  
PROGRAM MEMORY DATA  
DATA MEMORY DATA  
Power-Down Mode Featuring Low CMOS Standby  
Power Dissipation with 400 Cycle Recovery from  
Power-Down Condition  
OR  
EXTERNAL  
DATA  
BUS  
Low Power Dissipation in Idle Mode  
SERIAL PORTS  
SPORT 0 SPORT 1  
ARITHMETIC UNITS  
ALU SHIFTER  
TIMER  
INTERNAL  
DMA  
PORT  
MAC  
INTEGRATION  
ADSP-2100 Family Code Compatible, with Instruction  
Set Extensions  
ADSP-2100 BASE  
ARCHITECTURE  
HOST MODE  
80K Bytes of On-Chip RAM, Configured as 16K Words  
Program Memory RAM and 16K Words  
Data Memory RAM  
Dual Purpose Program Memory for Instruction and Data  
Storage  
Independent ALU, Multiplier/Accumulator and Barrel  
Shifter Computational Units  
Two Independent Data Address Generators  
Powerful Program Sequencer Provides Zero Overhead  
Looping Conditional Instruction Execution  
Programmable 16-Bit Interval Timer with Prescaler  
100-Lead LQFP  
GENERAL NOTE  
This data sheet represents specifications for the ADSP-2185L  
3.3 V processor.  
GENERAL DESCRIPTION  
The ADSP-2185L is a single-chip microcomputer optimized for  
digital signal processing (DSP) and other high speed numeric  
processing applications.  
SYSTEM INTERFACE  
The ADSP-2185L combines the ADSP-2100 family base archi-  
tecture (three computational units, data address generators and  
a program sequencer) with two serial ports, a 16-bit internal  
DMA port, a byte DMA port, a programmable timer, Flag I/O,  
extensive interrupt capabilities and on-chip program and data  
memory.  
16-Bit Internal DMA Port for High Speed Access to  
On-Chip Memory (Mode Selectable)  
4 MByte Memory Interface for Storage of Data Tables  
and Program Overlays (Mode Selectable)  
8-Bit DMA to Byte Memory for Transparent Program  
and Data Memory Transfers (Mode Selectable)  
I/O Memory Interface with 2048 Locations Supports  
Parallel Peripherals (Mode Selectable)  
Programmable Memory Strobe and Separate I/O Memory  
Space Permits “Glueless” System Design  
Programmable Wait State Generation  
Two Double-Buffered Serial Ports with Companding  
Hardware and Automatic Data Buffering  
Automatic Booting of On-Chip Program Memory from  
Byte-Wide External Memory, e.g., EPROM, or  
Through Internal DMA Port  
Six External Interrupts  
13 Programmable Flag Pins Provide Flexible System  
Signaling  
UART Emulation through Software SPORT Reconfiguration  
ICE-Port™ Emulator Interface Supports Debugging in  
Final Systems  
The ADSP-2185L integrates 80K bytes of on-chip memory  
configured as 16K words (24-bit) of program RAM, and 16K  
words (16-bit) of data RAM. Power-down circuitry is also pro-  
vided to meet the low power needs of battery operated portable  
equipment. The ADSP-2185L is available in 100-lead LQFP  
package.  
In addition, the ADSP-2185L supports instructions which  
include bit manipulations—bit set, bit clear, bit toggle, bit test—  
ALU constants, multiplication instruction (x squared), biased  
rounding, result free ALU operations, I/O memory transfers and  
global interrupt masking, for increased flexibility.  
Fabricated in a high speed, low power, CMOS process, the  
ADSP-2185L operates with a 19 ns instruction cycle time. Ev-  
ery instruction can execute in a single processor cycle.  
ICE-Port is a trademark of Analog Devices, Inc.  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1998  

ADSP-2185LBST-115 替代型号

型号 品牌 替代类型 描述 数据表
ADSP-2185LKST-115 ADI

类似代替

DSP Microcomputer

与ADSP-2185LBST-115相关器件

型号 品牌 获取价格 描述 数据表
ADSP-2185LBST-133 ADI

获取价格

DSP Microcomputer
ADSP-2185LBST-160 ADI

获取价格

DSP Microcomputer
ADSP-2185LBST-210 ADI

获取价格

DSP Microcomputer
ADSP-2185LBSTZ-133 ADI

获取价格

IC 24-BIT, 26.3 MHz, OTHER DSP, PQFP100, ROHS COMPLIANT, MS-026BED, LQFP-100, Digital Sign
ADSP-2185LBSTZ-1332 ADI

获取价格

DSP Microcomputer
ADSP-2185LBSTZ-160 ADI

获取价格

IC 24-BIT, 26.3 MHz, OTHER DSP, PQFP100, ROHS COMPLIANT, MS-026BED, LQFP-100, Digital Sign
ADSP-2185LBSTZ-1602 ADI

获取价格

DSP Microcomputer
ADSP-2185LBSTZ-210 ADI

获取价格

16-bit, 52 MIPS, 3.3v, 2 serial ports, host port, 80 KB RAM
ADSP-2185LBSTZ-2102 ADI

获取价格

DSP Microcomputer
ADSP-2185LKST-115 ADI

获取价格

DSP Microcomputer