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ADS5553IPFPG4 PDF预览

ADS5553IPFPG4

更新时间: 2024-11-26 21:54:55
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
24页 531K
描述
Dual 14 BIT, 65 MSPS Analog-to-Digital Converter

ADS5553IPFPG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:GREEN, PLASTIC, HTQFP-80针数:80
Reach Compliance Code:unknownECCN代码:3A991.C.3
HTS代码:8542.39.00.01风险等级:5.69
Is Samacsys:N最大模拟输入电压:2.3 V
最小模拟输入电压:转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:S-PQFP-G80JESD-609代码:e4
长度:12 mm最大线性误差 (EL):0.0244%
湿度敏感等级:3模拟输入通道数量:2
位数:14功能数量:1
端子数量:80最高工作温度:85 °C
最低工作温度:-40 °C输出位码:2'S COMPLEMENT BINARY
输出格式:PARALLEL, WORD封装主体材料:PLASTIC/EPOXY
封装代码:HTFQFP封装等效代码:TQFP80,.55SQ
封装形状:SQUARE封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified采样速率:65 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:1.2 mm
子类别:Analog to Digital Converters标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:12 mmBase Number Matches:1

ADS5553IPFPG4 数据手册

 浏览型号ADS5553IPFPG4的Datasheet PDF文件第2页浏览型号ADS5553IPFPG4的Datasheet PDF文件第3页浏览型号ADS5553IPFPG4的Datasheet PDF文件第4页浏览型号ADS5553IPFPG4的Datasheet PDF文件第5页浏览型号ADS5553IPFPG4的Datasheet PDF文件第6页浏览型号ADS5553IPFPG4的Datasheet PDF文件第7页 
ADS5553  
www.ti.com  
SLWS158 FEBRUARY 2005  
Dual 14 BIT, 65 MSPS  
Analog-to-Digital Converter  
D
D
D
D
Analog Power Dissipation = 0.72 W  
FEATURES  
Output Supply Power Dissipation = 0.17 W  
80 Lead PowerPadE TQFP Package  
Two’s Complement Output Format  
D
D
D
D
D
D
D
D
Dual ADC  
14 Bit Resolution  
65 MSPS Sample Rate  
High SNR = 74 dBFs at 70 MHz f  
High SFDR = 84 dBc at 70 MHz f  
IN  
IN  
APPLICATIONS  
D
D
D
Communication Receivers  
2.3 V Differential Input Voltage  
PP  
Base Station Infrastructure  
Internal / External Voltage Reference  
3.3 V Single-Supply Voltage  
Test and Measurement Instrumentation  
DESCRIPTION  
The ADS5553 is a high-performance, dual channel, 14 bit, 65 MSPS analog-to-digital converter (ADC). To provide  
a complete solution, each channel includes a high-bandwidth linear sample-and-hold stage (S&H) and an internal  
reference. Designed for applications demanding high dynamic performance in a small space, the ADS5553 has  
excellent power consumption of 0.9 W at 3.3 V single-supply voltage. This allows an even higher system integration  
density. The provided internal reference simplifies system design requirements, yet an external reference can be  
used optionally to suit the accuracy and low drift requirements of the application. The outputs are parallel CMOS  
compatible.  
The ADS5553 is available in a 80 lead TQFP PowerPAD package and is specified over the full temperature range  
of 40°C to 85°C.  
AV  
DRV  
DD  
DD  
VREFP  
VREFM  
Internal Reference  
14-Bit  
D0  
V
+
Digital  
Error  
Correction  
IN  
.
.
Output  
Control  
Pipeline  
S&H  
.
ADC Core  
V
IN  
D13  
CLK+  
CLK−  
CLK+  
CLK−  
Timing Circuitry  
Timing Circuitry  
14-Bit  
D0  
V
V
+
Digital  
Error  
Correction  
IN  
.
.
.
Output  
Control  
Pipeline  
S&H  
ADC Core  
IN  
D13  
VREFP  
VREFM  
Internal Reference  
ADS5553  
DR  
A
GND  
GND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
CommsADC is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date. Products  
conform to specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all parameters.  
Copyright 2005, Texas Instruments Incorporated  

ADS5553IPFPG4 替代型号

型号 品牌 替代类型 描述 数据表
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