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ADP3801AR PDF预览

ADP3801AR

更新时间: 2024-02-25 23:14:08
品牌 Logo 应用领域
亚德诺 - ADI 电池开关
页数 文件大小 规格书
20页 258K
描述
High Frequency Switch Mode Dual Li-Ion Battery Chargers

ADP3801AR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:unknown风险等级:5.72
模拟集成电路 - 其他类型:BATTERY CHARGE CONTROLLER控制模式:CURRENT/VOLTAGE-MODE
控制技术:PULSE WIDTH MODULATION最大输入电压:20 V
最小输入电压:4.1 V标称输入电压:10 V
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm湿度敏感等级:NOT SPECIFIED
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
标称输出电压:3.3 V封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):220
认证状态:COMMERCIAL座面最大高度:1.75 mm
表面贴装:YES切换器配置:SINGLE
最大切换频率:250 kHz温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

ADP3801AR 数据手册

 浏览型号ADP3801AR的Datasheet PDF文件第14页浏览型号ADP3801AR的Datasheet PDF文件第15页浏览型号ADP3801AR的Datasheet PDF文件第16页浏览型号ADP3801AR的Datasheet PDF文件第17页浏览型号ADP3801AR的Datasheet PDF文件第19页浏览型号ADP3801AR的Datasheet PDF文件第20页 
ADP3801/ADP3802  
system current and dynamically control the ADP3801/ADP3802’s  
charge current.  
VCC Greater Than 20 V Operation  
Some ac/dc adapters have a poorly regulated output voltage  
that can rise above the 20 V maximum operating voltage of the  
ADP3801/ADP3802. The circuit in Figure 34 uses a Zener  
diode and an NPN transistor to extend the ADP3801/ADP3802’s  
maximum input voltage. The Zener should be at least 3 V higher  
than the final battery voltage to meet the minimum headroom  
requirements. 3 V is used to account for the VBE drop of the  
2N3904 transistor and additional losses in the circuit. If VIN  
drops below the value of the Zener diode, VCC is no longer  
regulated and it tracks VIN. If the 2 V of headroom on the cur-  
rent sense pins is not maintained, then the circuits of Figures 32  
and 33 can also be used in conjunction with the circuit of Figure  
34.  
The current setting voltage is produced by R3 and R4 according  
to the following formula:  
1
R3  
ISET  
×
VL  
10 RCS  
R3 + R4  
This equation is approximate because the impedance of R2 and  
R1 does effect the resistor divider of R3 and R4, but the impact  
is small. As the system current increases, the voltage across RSS  
also increases. This voltage is subtracted from VISET with a gain  
set by R1 and R2. As the graph in Figure 35 shows, the charge  
current reduces as the system current increases, and eventually  
the charge current becomes zero (IZERO). The system current at  
which this occurs can be set by selecting R1 and R2 according  
to the following formula:  
33H  
40m⍀  
V
IN  
10k⍀  
100k⍀  
140F  
BAT  
9V  
2N3904  
9V  
R1  
R2  
10RCS  
0.1F  
0.1F  
IZERO  
×
× ISET  
RSS  
VCC  
DRV  
CS+ CS– A/B  
EOC  
Because the AD8531 is a single supply amplifier with its nega-  
tive rail at ground, its output does not go below 0.0 V, so any  
further increase in system current does not change VISET. De-  
3.3V  
BATA  
VL  
BATB  
signing a charger with a maximum charge current of 3A (RCS  
0.05 ) which reduces to zero when the system current reaches  
7A (RSS = 0.025 ) results in the following resistor values: R1 =  
100 k, R2 = 820 k, R3 = 8.3 k, R4 = 10 k.  
=
SD  
ADP3801/ADP3802  
RESET  
ISET  
I
SYSTEM  
VCC  
AC/DC  
SYSTEM  
PROG  
BRICK  
R1  
100k⍀  
R2  
820k⍀  
R
SS  
R1  
100k⍀  
GND  
ADJ  
COMP  
OP193  
R2  
820k⍀  
R4  
10k⍀  
R3  
8.3k⍀  
I
Figure 34. VCC Greater Than 20 V Operation  
BAT  
The gate drive of the PFET is capacitively coupled to the DRV  
pin with a 0.1 µF capacitor. While the DRV pin is switching, the  
voltage swing on the DRV pin is coupled to the gate, but the dc  
voltage is blocked. This allows the gate of the PFET to be at a  
voltage that is higher than the absolute maximum rating of the  
DRV pin. The 9 V Zener diode limits the gate drive voltage and  
the 100 kresistor provides a dc pull-up to turn the PFET off  
when the DRV pin is not switching.  
R
CS  
BAT  
DRV  
CS+  
VCC  
CS–  
V
BAT  
ADP3801/ADP3802  
VL  
100k⍀  
0.1F  
ISET  
System Current Sense Reduces Charge Current  
In many applications the power required for the system and the  
battery charger exceeds the total power available from the ac/dc  
adapter. A design where battery charger current is decreased as  
the system current increases helps to keep a constant power  
demand on the brick. Dynamically adjusting the charge current  
keeps the total power output of the brick constant. The circuit  
in Figure 35 uses an external low cost amplifier to sense the  
I
(I  
) = MAXIMUM CHARGE CURRENT  
BAT  
SET  
0
I
I
ZERO  
0
SYSTEM  
Figure 35. System Current Sense Reduces Charge Current  
–18–  
REV. 0  

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