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ADP3419JRM-REEL PDF预览

ADP3419JRM-REEL

更新时间: 2024-02-01 15:56:50
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器接口集成电路光电二极管
页数 文件大小 规格书
13页 181K
描述
Dual Bootstrapped, High Voltage MOSFET Driver with Output Disable

ADP3419JRM-REEL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:MSOP
包装说明:LEAD FREE, MSOP-10针数:10
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.46
高边驱动器:YES接口集成电路类型:HALF BRIDGE BASED MOSFET DRIVER
JESD-30 代码:S-PDSO-G10JESD-609代码:e3
长度:3 mm湿度敏感等级:1
功能数量:1端子数量:10
最高工作温度:100 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP10,.19,20封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:1.1 mm子类别:MOSFET Drivers
标称供电电压:5 V电源电压1-最大:26 V
电源电压1-分钟:4 V表面贴装:YES
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3 mm

ADP3419JRM-REEL 数据手册

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ADP3419  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
1
2
3
4
5
10  
9
IN  
SD  
BST  
DRVH  
SW  
ADP3419  
TOP VIEW  
(Not to Scale)  
8
DRVLSD  
CROWBAR  
VCC  
7
GND  
DRVL  
6
Figure 5. Pin Configuration  
Table 3. Pin Function Descriptions  
Pin No. Mnemonic Function  
1
IN  
Logic Level PWM Input. This pin has primary control of the drive outputs. In normal operation, pulling this pin  
low turns on the low-side driver; pulling it high turns on the high-side driver.  
2
3
SD  
Shutdown Input. When low, this pin disables normal operation, forcing DRVH and DRVL low.  
Synchronous Rectifier Shutdown Input. When low, DRVL is forced low; when high, DRVL is enabled and  
controlled by IN and by the adaptive overlap protection control circuitry.  
DRVLSD  
4
5
6
7
8
CROWBAR  
VCC  
DRVL  
GND  
Crowbar Input. When high, DRVL is forced high regardless of the high-side MOSFET switch condition.  
Input Supply. This pin should be bypassed to GND with a 4.7 μF or larger ceramic capacitor.  
Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) MOSFET.  
Ground. This pin should be closely connected to the source of the lower MOSFET.  
Switch Node Input. This pin is connected to the buck-switching node, close to the upper MOSFET’s source. It is  
the floating return for the upper MOSFET drive signal. It is also used to monitor the switched voltage to prevent  
turn-on of the lower MOSFET until the voltage is below ~1 V.  
SW  
9
10  
DRVH  
BST  
Buck Drive. Output drive for the upper (buck) MOSFET.  
Upper MOSFET Floating Bootstrap Supply. A capacitor connected between the BST and SW pins holds this  
bootstrapped voltage for the high-side MOSFET as it is switched.  
Rev. 2 | Page 6 of 13 | www.onsemi.com  

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