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ADP3421 PDF预览

ADP3421

更新时间: 2024-02-08 06:03:21
品牌 Logo 应用领域
亚德诺 - ADI 转换器DC-DC转换器控制器
页数 文件大小 规格书
12页 149K
描述
Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs

ADP3421 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:TSSOP,
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.22模拟集成电路 - 其他类型:SWITCHING CONTROLLER
最大输入电压:5 V最小输入电压:3 V
标称输入电压:3.3 VJESD-30 代码:R-PDSO-G28
JESD-609代码:e0长度:9.7 mm
湿度敏感等级:3功能数量:1
端子数量:28最高工作温度:100 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:1.2 mm
表面贴装:YES切换器配置:SINGLE
温度等级:OTHER端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

ADP3421 数据手册

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Geyserville-Enabled DC-DC  
Converter Controller for Mobile CPUs  
a
ADP3421  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Meets Intel® Mobile Voltage Positioning Requirements  
Lowest Processor Dissipation for Longest Battery Life  
Best Transient Containment  
ADP3421  
DACOUT  
Minimum Number of Output Capacitors  
System Power Management Compliant  
Fast, Smooth Output Transition During VID Code  
Change  
Programmable Current Limit  
Power Good  
VID4  
VID3  
CLSET  
CS+  
CS–  
VID DAC  
VID2  
VID1  
CURRENT  
LIMIT  
COMPARATOR  
VID0  
Integrated LDO Controllers for Clock and I/O Supplies  
Programmable UVLO  
VHYS  
REG  
EN  
Soft Start with Restart Lock-In  
LTO  
LTB  
LTI  
RAMP  
LEVEL  
CORE  
TRANSLATOR  
COMPARATOR  
APPLICATIONS  
OUT  
Geyserville-Enabled Core DC-DC Converters  
Fixed Voltage Mobile CPU Core DC-DC Converters  
Notebook/Laptop Power Supplies  
Programmable Output Power Supplies  
CORE CONTROLLER  
CLKDRV  
CLKFB  
IODRV  
CLOCK LDO  
CONTROLLER  
SSC  
SSL  
SOFT START  
TIMER  
AND  
POWER GOOD  
GENERATOR  
GENERAL DESCRIPTION  
I/O LDO  
IOFB  
BIAS AND  
CORE  
CONTROLLER  
The ADP3421 is a hysteretic dc-dc buck converter controller  
with two auxiliary linear regulator controllers. The ADP3421  
provides a total power conversion control solution for a micro-  
processor by delivering the core, I/O, and clock voltages. The  
optimized low-voltage design is powered from the 3.3 V system  
supply and draws only 10 µA maximum in shutdown. The main  
output voltage is set by a 5-bit VID code. To accommodate the  
transition time required by the newest processors for on-the-  
fly VID changes, the ADP3421 features high-speed operation  
to allow a minimized inductor size that results in the fastest change  
of current to the output. To further allow for the minimum  
number of output capacitors to be used, the ADP3421 features  
active voltage positioning that can be optimally compensated  
to ensure a superior load transient response. The main output  
signal interfaces with the ADP3410 dual MOSFET driver,  
which is optimized for high speed and high efficiency for driving  
both the upper and lower (synchronous) MOSFETs of the  
buck converter.  
REFERENCE  
BIAS EN  
VIN/VCC  
MONITOR AND  
UVLO BIAS  
REFERENCE  
CONTROLLER  
UVLO  
VCC  
GND  
PWRGD  
SD  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2002  

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