ADM1067
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code that tells the slave
device to expect a block read. The ADM1067 command
code for a block read is 0xFD (1111 1101).
5. The slave asserts ACK on SDA.
Error Correction
The ADM1067 provides the option of issuing a packet error
correction (PEC) byte after a write to RAM, a write to EEPROM,
a block write to RAM/EEPROM, or a block read from RAM/
EEPROM. This enables the user to verify that the data received
by or sent from the ADM1067 is correct. The PEC byte is an
optional byte sent after that last data byte has been written to or
read from the ADM1067. The protocol is as follows:
6. The master asserts a repeat start condition on SDA.
7. The master sends the 7-bit slave address followed by the
read bit (high).
1. The ADM1067 issues a PEC byte to the master. The master
checks the PEC byte and issues another block read, if the
PEC byte is incorrect.
2. A no acknowledge (NACK) is generated after the PEC byte
to signal the end of the read.
8. The slave asserts ACK on SDA.
9. The ADM1067 sends a byte-count data byte that tells the
master how many data bytes to expect. The ADM1067
always returns 32 data bytes (0x20), which is the maximum
allowed by the SMBus 1.1 specification.
10. The master asserts ACK on SDA.
11. The master receives 32 data bytes.
12. The master asserts ACK on SDA after each data byte.
13. The master asserts a stop condition on SDA to end the
transaction.
Note that the PEC byte is calculated using CRC-8. The frame
check sequence (FCS) conforms to CRC-8 by the polynomial
C(x) = x8 + x2 + x1 + 1
See the SMBus 1.1 specification for details.
An example of a block read with the optional PEC byte is shown
in Figure 41.
1
2
3
4
5
6
7
8
9
10 11 12
1
2
3
4
5
6
7
8
9
10 11 12
SLAVE
ADDRESS
COMMAND 0xFD
(BLOCK READ)
SLAVE
ADDRESS
BYTE
COUNT
DATA
1
SLAVE
ADDRESS
COMMAND 0xFD
(BLOCK READ)
SLAVE
ADDRESS
BYTE
COUNT
DATA
1
S
W
A
A
S
R A
A
A
S
W
A
A
S
R A
A
A
13 14 15
13 14
DATA
32
DATA
32
A
PEC A P
A
P
Figure 41. Block Read from EEPROM or RAM with PEC
Figure 40. Block Read from EEPROM or RAM
Rev. B | Page 31 of 32