Datasheet > ADF4213BCP-REEL7

ADF4213BCP-REEL7

更新时间： 2024-01-18 17:56:54

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
20页	248K
描述
IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, QCC20, CSP-20, PLL or Frequency Synthesis Circuit

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ADF4213BCP-REEL7 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFN	包装说明：	CSP-20
针数：	20	Reach Compliance Code：	not_compliant
ECCN代码：	5A991.B	HTS代码：	8542.39.00.01
风险等级：	5.76	模拟集成电路 - 其他类型：	PLL FREQUENCY SYNTHESIZER
JESD-30 代码：	S-XQCC-N20	JESD-609代码：	e0
长度：	4 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	VQCCN
封装等效代码：	LCC20,.16SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, VERY THIN PROFILE	峰值回流温度（摄氏度）：	240
电源：	3/5 V	认证状态：	Not Qualified
座面最大高度：	0.9 mm	子类别：	PLL or Frequency Synthesis Circuits
最大供电电流 (Isup)：	20 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn85Pb15)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	4 mm	Base Number Matches：	1

ADF4213BCP-REEL7 数据手册

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ADF4210/ADF4211/ADF4212/ADF4213

–60

–70

PRESCALER (P/P + 1)

The dual modulus prescaler (P/P + 1), along with the A and

B counters, enables the large division ratio, N, to be realized

(N = PB + A). The dual-modulus prescaler, operating at CML

levels, takes the clock from the RF/IF input stage and divides

it down to a manageable frequency for the CMOS A and B

counters in the RF and If sections. The prescaler in both

sections is programmable. It can be set in software to 8/9, 16/17,

32/33, or 64/65. See Tables IV and VI. It is based on a syn-

chronous 4/5 core.

= 3V

= 5V

–80

–90

RF/IF A AND B COUNTERS

The A and B CMOS counters combine with the dual modulus

prescaler to allow a wide ranging division ratio in the PLL

feedback counter. The counters are speciﬁed to work when the

prescaler output is 200 MHz or less, when V_DD= 5 V. Typically,

they will work with 250 MHz output from the prescaler. Thus,

with an RF input frequency of 2.5 GHz, a prescaler value of

16/17 is valid, but a value of 8/9 is not valid.

–100

–40

–20

100

TEMPERATURE – ꢂC

TPC 19. ADF4213 Reference Spurs vs. Temperature

(836 MHz, 30 kHz, 3 kHz)

Pulse Swallow Function

CIRCUIT DESCRIPTION

REFERENCE INPUT SECTION

The reference input stage is shown below in Figure 2. SW1 and

SW2 are normally-closed switches. SW3 is normally-open. When

power-down is initiated, SW3 is closed and SW1 and SW2 are

opened. This ensures that there is no loading of the REF_INpin

on power-down.

The A and B counters, in conjunction with the dual modulus

prescaler make it possible to generate output frequencies which

are spaced only by the Reference Frequency divided by R. The

equation for the VCO frequency is as follows:

_VCO= [(P × B) + A] × f_REFIN/R

f_VCO= Output Frequency of external voltage controlled

oscillator (VCO).

POWER-DOWN

CONTROL

= Preset modulus of dual modulus prescaler (8/9,

16/17, etc.).

100kꢁ

SW2

= Preset Divide Ratio of binary 13-bit counter

(3 to 8191).

TO R COUNTER

REF

SW1

BUFFER

= Preset Divide Ratio of binary 6-bit A counter

(0 to 63).

SW3

NC = NO CONNECT

f_REFIN= External reference frequency oscillator.

Figure 2. Reference Input Stage

RF/IF INPUT STAGE

= Preset divide ratio of binary 15-bit programmable refer-

ence counter (1 to 32767).

The RF/IF input stage is shown in Figure 3. It is followed by a

2-stage limiting ampliﬁer to generate the CML (Current Mode

Logic) clock levels needed for the prescaler.

N = BP + A

TO PFD

13-BIT B-

COUNTER

LOAD

FROM RF

INPUT STAGE

PRESCALER

P/P + 1

1.6V

BIAS

GENERATOR

LOAD

5-BIT A-

MODULUS

CONTROL

COUNTER

2kꢁ

Figure 4. RF/IF A and B Counters

RF/IF COUNTER

The 15-bit RF/IF R counter allows the input reference fre-

quency to be divided down to product the input clock to the

phase frequency detector (PFD). Division ratios from 1 to

32767 are allowed.

AGND

Figure 3. RF/IF Input Stage

–9–

REV. A

1...6 7 8910 11 12...20

中文翻译

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与ADF4213BCP-REEL7相关器件

型号	品牌	获取价格	描述	数据表
ADF4213BCPZ	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, QCC20, CSP-20, PLL or Frequency Synthesis Circuit
ADF4213BCPZ-RL	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, QCC20, CSP-20, PLL or Frequency Synthesis Circuit
ADF4213BCPZ-RL7	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, QCC20, CSP-20, PLL or Frequency Synthesis Circuit
ADF4213BRCHIPS	ADI	获取价格	IC PHASE DETECTOR, 2500 MHz, UUC, DIE, PLL or Frequency Synthesis Circuit
ADF4213BRU	ADI	获取价格	Dual RF/IF PLL Frequency Synthesizers
ADF4213BRU-REEL	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu
ADF4213BRU-REEL7	ROCHESTER	获取价格	PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-20
ADF4213BRU-REEL7	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu
ADF4213BRUZ	ADI	获取价格	Dual RF/IF PLL Frequency Synthesizer 1.0 GHz / 3 GHz
ADF4213BRUZ-REEL	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu

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