Datasheet > ADDI7015BBCZRL

ADDI7015BBCZRL

更新时间： 2024-09-17 21:17:43

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
3页	101K
描述
Quad-Channel, 16-Bit CCD Signal Processor with Precision Timing Core

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ADDI7015BBCZRL 数据手册

Quad-Channel, 16-Bit CCD Signal

Processor with Precision Timing Core

Data Sheet

ADDI7015

FEATURES

GENERAL DESCRIPTION

4 independent AFE channels

The ADDI7015 is a highly integrated, quad-channel, CCD

signal processor for high speed digital imaging applications.

Each channel is specified at pixel rates of up to 65 MHz and

consists of a complete analog front end (AFE) with analog-to-

digital conversion. The Precision Timing® core allows adjust-

ment of the correlated double sampler (CDS) and sample-and-

hold amplifier (SHA) clocks with 240 ps resolution at 65 MHz

operation. There are eight independent horizontal clock outputs

to support a variety of CCD timing requirements. The

ADDI7015 also features a programmable ISATG for vertical

timing generation.

1.8 V analog and digital core supply voltage

Complete on-chip ISATG timing generator with 16 XV

outputs and 4 general-purpose outputs (GPO)

Differential analog inputs

CDS or SHA (CDS bypass) with 7 gain settings

0 dB to 36 dB, 10-bit variable gain amplifier (VGA)

16-bit, 65 MSPS analog-to-digital converter (ADC)

Precision Timing core with 240 ps resolution at 65 MHz

8 programmable H-clock outputs

On-chip sync generator with external sync input

8 mm × 8 mm CSP_BGA package with 0.65 pitch

Each analog front end includes black level clamping, a CDS, a

VGA, and a 65 MSPS, 16-bit analog-to-digital converter (ADC).

Operation is programmed using a 4-wire serial interface.

APPLICATIONS

Industrial cameras

Surveillance cameras

Medical imaging

Professional photography

Packaged in a space-saving, 8 mm × 8 mm, CSP_BGA, the

ADDI7015 is specified over an operating temperature range of

−25°C to +85°C.

FUNCTIONAL BLOCK DIAGRAM

ADDI7015

AFE_A

VREF

DOUT0P_A

DOUT0N_A

DOUT1P_A

DOUT1N_A

DOUT0P_B

DOUT0N_B

DOUT1P_B

DOUT1N_B

TCLKP_AC

TCLKN_AC

TCLKP_BD

TCLKN_BD

DOUT0P_C

DOUT0N_C

DOUT1P_C

DOUT1N_C

DOUT0P_D

DOUT0N_D

DOUT1P_D

DOUT1N_D

INP_A

INM_A

CDS/

SHA

ADC

VGA

0dB TO 36dB

0dB TO 18dB

CLAMP

INP_B

INM_B

INP_C

INM_C

INP_D

INM_D

REDUCED

RANGE

AFE_B

AFE_C

LVDS

INTERFACE

AFE_D

INTERNAL CLOCKS

H1 TO H8

Precision

Timing

CORE

XV1 TO XV16

CLI

ISATG

GPO1 TO GPO4

SYNC

GENERATOR

INTERNAL

REGISTERS

VD SYNC

SL1

SL2

SCK

SDATA

NOTES

1. THE CIRCUITRY FOR AFE_A TO AFE_D IS IDENTICAL.

Figure 1.

For more information on the ADDI7015, email Analog Devices, Inc., at afe.ccd@analog.

Rev. Sp0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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ADDI7015BBCZRL 替代型号

型号	品牌	替代类型	描述	数据表
ADDI7015BBCZ	ADI	类似代替	Quad-Channel, 16-Bit CCD Signal Processor with Precision Timing Core

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