Ultrafast SiGe
Voltage Comparators
ADCMP580/ADCMP581/ADCMP582
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
CCI
180 ps propagation delay
25 ps overdrive and slew rate dispersion
8 GHz equivalent input rise time bandwidth
100 ps minimum pulse width
37 ps typical output rise/fall
10 ps deterministic jitter (DJ)
V
TERMINATION
TP
V
CCO
V
NONINVERTING
INPUT
P
Q OUTPUT
Q OUTPUT
ADCMP580/
ADCMP581/
ADCMP582
CML/ECL/
PECL
200 fs random jitter (RJ)
V
INVERTING
INPUT
N
−2 V to +3 V input range with +5 V/−5 V supplies
On-chip terminations at both input pins
Resistor-programmable hysteresis
Differential latch control
V
EE
V
TERMINATION
HYS
TN
LE INPUT
LE INPUT
Power supply rejection > 70 dB
V
EE
Figure 1.
APPLICATIONS
Automatic test equipment (ATE)
High speed instrumentation
Pulse spectroscopy
Medical imaging and diagnostics
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Clock and data signal restoration
GENERAL DESCRIPTION
The ADCMP580/ADCMP581/ADCMP582 are ultrafast voltage
comparators fabricated on the Analog Devices, Inc. proprietary
XFCB3 Silicon Germanium (SiGe) bipolar process. The
ADCMP580 features CML output drivers, the ADCMP581
features reduced swing ECL (negative ECL) output drivers, and
the ADCMP582 features reduced swing PECL (positive ECL)
output drivers.
The CML output stage is designed to directly drive 400 mꢀ into
50 Ω transmission lines terminated to ground. The NECL output
stages are designed to directly drive 400 mꢀ into 50 Ω terminated
to −2 ꢀ. The PECL output stages are designed to directly drive
400 mꢀ into 50 Ω terminated to ꢀCCO − 2 ꢀ. High speed latch
and programmable hysteresis are also provided. The differential
latch input controls are also 50 Ω terminated to an independent
ꢀ
TT pin to interface to either CML or ECL or to PECL logic.
All three comparators offer 180 ps propagation delay and 100 ps
minimum pulse width for 10 Gbps operation with 200 fs random
jitter (RJ). Overdrive and slew rate dispersion are typically less
than 15 ps.
The ADCMP580/ADCMP581/ADCMP582 are available in a
16-lead LFCSP_ꢀQ.
The 5 ꢀ power supplies enable a wide −2 ꢀ to +3 ꢀ input
range with logic levels referenced to the CML/NECL/PECL
outputs. The inputs have 50 Ω on-chip termination resistors
with the optional capability to be left open (on an individual
pin basis) for applications requiring high impedance input.
Rev. A
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