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ADCMP600_15 PDF预览

ADCMP600_15

更新时间: 2022-02-26 10:24:59
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 291K
描述
Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,

ADCMP600_15 数据手册

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Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,  
Single-Supply TTL/CMOS Comparators  
ADCMP600/ADCMP601/ADCMP602  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Fully specified rail to rail at VCC = 2.5 V to 5.5 V  
Input common-mode voltage from −0.2 V to VCC + 0.2 V  
Low glitch CMOS-/TTL-compatible output stage  
3.5 ns propagation delay  
NONINVERTING  
INPUT  
ADCMP600/  
Q OUTPUT  
ADCMP601/  
ADCMP602  
INVERTING  
10 mW at 3.3 V  
INPUT  
Shutdown pin  
Single-pin control for programmable hysteresis and latch  
Power supply rejection > 50 dB  
Improved replacement for MAX999  
−40°C to +125°C operation  
LE/HYS  
(EXCEPT ADCMP600)  
S
DN  
(ADCMP602 ONLY)  
Figure 1.  
APPLICATIONS  
High speed instrumentation  
Clock and data signal restoration  
Logic level shifting or translation  
Pulse spectroscopy  
High speed line receivers  
Threshold detection  
Peak and zero-crossing detectors  
High speed trigger circuitry  
Pulse-width modulators  
Current/voltage-controlled oscillators  
Automatic test equipment (ATE)  
GENERAL DESCRIPTION  
input signal range while still allowing independent output  
swing control and power savings.  
The ADCMP600, ADCMP601, and ADCMP602 are very fast  
comparators fabricated on XFCB2, an Analog Devices, Inc.  
proprietary process. These comparators are exceptionally  
versatile and easy to use. Features include an input range from  
GND − 0.5 V to VCC + 0.2 V, low noise, TTL-/CMOS-compatible  
output drivers, and latch inputs with adjustable hysteresis  
and/or shutdown inputs.  
The TTL-/CMOS-compatible output stage is designed to drive  
up to 5 pF with full timing specs and to degrade in a graceful  
and linear fashion as additional capacitance is added. The  
comparator input stage offers robust protection against large  
input overdrive, and the outputs do not phase reverse when the  
valid input signal range is exceeded. Latch and programmable  
hysteresis features are also provided with a unique single-pin  
control option.  
The device offers 5 ns propagation delay with 10 mV overdrive  
on 3 mA typical supply current.  
A flexible power supply scheme allows the devices to operate  
with a single +2.5 V positive supply and a −0.5 V to +2.8 V  
input signal range up to a +5.5 V positive supply with a −0.5 V  
to +5.8 V input signal range. Split input/output supplies with no  
sequencing restrictions on the ADCMP602 support a wide  
The ADCMP600 is available in 5-lead SC70 and SOT-23  
packages, the ADCMP601 is available in a 6-lead SC70 package,  
and the ADCMP602 is available in an 8-lead MSOP package.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2006–2011 Analog Devices, Inc. All rights reserved.  
 
 
 
 

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