ADCMP600/ADCMP601/ADCMP602
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Q
1
2
3
6
5
4
V
/V
CCI CCO
Q
1
2
3
5
V
/V
CCI CCO
V
1
2
3
4
8
7
6
5
V
CCO
CCI
ADCMP600
ADCMP601
ADCMP602
GND
GND
LE/HYS
V
P
Q
TOP VIEW
TOP VIEW
TOP VIEW
(Not to Scale)
(Not to Scale)
V
GND
LE/HYS
N
(Not to Scale)
V
P
4
V
N
V
P
V
N
S
DN
Figure 3. ADCMP600 Pin Configuration
Figure 4. ADCMP601 Pin Configuration
Figure 5. ADCMP602 Pin Configuration
Table 5. ADCMP600 (SOT-23-5 and SC70-5) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater
than the analog voltage at the inverting input, VN.
2
3
4
5
GND
VP
VN
Negative Supply Voltage.
Noninverting Analog Input.
Inverting Analog Input.
Input Section Supply/Output Section Supply. Shared pin.
VCCI/VCCO
Table 6. ADCMP601 (SC70-6) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater
than the analog voltage at the inverting input, VN, if the comparator is in compare mode.
2
3
4
5
6
GND
VP
VN
LE/HYS
VCCI/VCCO
Negative Supply Voltage.
Noninverting Analog Input.
Inverting Analog Input.
Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch.
Input Section Supply/Output Section Supply. Shared pin.
Table 7. ADCMP602 (MSOP-8) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
4
5
6
7
VCCI
VP
VN
Input Section Supply.
Noninverting Analog Input.
Inverting Analog Input.
Shutdown. Drive this pin low to shut down the device.
Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch.
Negative Supply Voltage.
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater
than the analog voltage at the inverting input, VN, if the comparator is in compare mode.
SDN
LE/HYS
GND
Q
8
VCCO
Output Section Supply.
Rev. A | Page 7 of 16