Datasheet > ADC32J23

ADC32J23

更新时间： 2024-11-24 00:46:43

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德州仪器 - TI		/
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描述
ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD204B Interface

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ADC32J22, ADC32J23, ADC32J24, ADC32J25

SBAS668A –MAY 2014–REVISED JUNE 2015

ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter

with JESD204B Interface

1 Features

3 Description

The ADC32J2x is a high-linearity, ultra-low power,

dual-channel, 12-bit, 50-MSPS to 160-MSPS, analog-

to-digital converter (ADC) family. The devices are

designed specifically to support demanding, high

input frequency signals with large dynamic range

requirements. A clock input divider allows more

flexibility for system clock architecture design and the

•

Dual Channel

•

12-Bit Resolution

Single 1.8-V Supply

Flexible Input Clock Buffer with Divide-by-1, -2, -4

SNR = 70.3 dBFS, SFDR = 88 dBc at

f_IN= 70 MHz

SYSREF

input

enables

complete

system

•

Ultralow Power Consumption:

synchronization. The devices support JESD204B

interfaces in order to reduce the number of interface

lines, thus allowing for high system integration

density. The JESD204B interface is a serial interface,

where the data of each ADC are serialized and output

over only one differential pair. An internal phase-

locked loop (PLL) multiplies the incoming ADC

sampling clock by 20 to derive the bit clock that is

used to serialize the 12-bit data from each channel.

The devices support subclass 1 with interface speeds

up to 3.2 Gbps.

–

227 mW/Ch at 160 MSPS

•

Channel Isolation: 105 dB

Internal Dither

JESD204B Serial Interface:

–

Subclass 0, 1, 2 Compliant up to 3.2 Gbps

Supports One Lane per ADC up to 160 MSPS

•

Support for Multichip Synchronization

Pin-to-Pin Compatible with 14-Bit Version

(ADC32J4X)

Device Information⁽¹⁾

•

Package: VQFN-48 (7 mm × 7 mm)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

ADC32J2X

VQFN (48)

7.00 mm × 7.00 mm

2 Applications

(1) For all available packages, see the package option addendum

at the end of the datasheet.

•

Multi-Carrier, Multi-Mode Cellular Base Stations

Radar and Smart Antenna Arrays

Munitions Guidance

FFT with Dither On

(f_S= 160 MSPS, SNR = 70.3 dBFS, f_IN= 10 MHz,

SFDR = 92.6 dBc)

Motor Control Feedback

Network and Vector Analyzers

Communications Test Equipment

Nondestructive Testing

-10

-20

Microwave Receivers

-30

Software Defined Radios (SDRs)

Quadrature and Diversity Radio Receivers

-40

-50

-60

-70

-80

-90

-100

-110

-120

Frequency (MHz)

D201

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

12 3 4 5 6 7...85

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与ADC32J23相关器件

型号	品牌	获取价格	描述	数据表
ADC32J23IRGZ25	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J23IRGZR	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J23IRGZT	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J24	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J24IRGZ25	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J24IRGZR	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J24IRGZT	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J25	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J25IRGZ25	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2
ADC32J25IRGZR	TI	获取价格	ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD2

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