ADC10D040
www.ti.com
SNAS149G –OCT 2001–REVISED MARCH 2013
ADC10D040 Dual 10-Bit, 40 MSPS, 267 mW A/D Converter
Check for Samples: ADC10D040
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FEATURES
DESCRIPTION
The ADC10D040 is
a
dual low power, high
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Internal Sample-and-Hold
Internal Reference Capability
Dual Gain Settings
performance CMOS analog-to-digital converter that
digitizes signals to 10 bits resolution at sampling
rates up to 45 MSPS while consuming a typical 267
mW from a single 3.3V supply. No missing codes is
specified over the full operating temperature range.
The unique two stage architecture achieves 9.4
Effective Bits over the entire Nyquist band at 40 MHz
sample rate. An output formatting choice of offset
binary or 2's complement coding and a choice of two
gain settings eases the interface to many systems.
Also allowing great flexibility of use is a selectable 10-
bit multiplexed or 20-bit parallel output mode. An
offset correction feature minimizes the offset error.
Offset Correction
Selectable Offset Binary or 2's Complement
Output
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Multiplexed or Parallel Output Bus
Single +3.0V to 3.6V Operation
Power Down and Standby Modes
3V TTL Logic Input/Output Compatible
APPLICATIONS
To ease interfacing to most low voltage systems, the
digital output power pins of the ADC10D040 can be
tied to a separate supply voltage of 1.5V to 3.6V,
making the outputs compatible with other low voltage
systems. When not converting, power consumption
can be reduced by pulling the PD (Power Down) pin
high, placing the converter into a low power state
where it typically consumes less than 1 mW and from
which recovery is less than 1 ms. Bringing the STBY
(Standby) pin high places the converter into a
standby mode where power consumption is about 30
mW and from which recovery is 800 ns.
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Digital Video
CCD Imaging
Portable Instrumentation
Communications
Medical Imaging
Ultrasound
KEY SPECIFICATIONS
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Resolution: 10 Bits
Conversion Rate: 40 MSPS
ENOB: 9.4 Bits (typ)
DNL: 0.35 LSB (typ)
The ADC10D040's speed, resolution and single
supply operation make it well suited for a variety of
applications,
applications.
including
high
speed
portable
Conversion Latency Parallel Outputs: 2.5
Clock Cycles
Operating over the industrial (−40° ≤ TA ≤ +85°C)
temperature range, the ADC10D040 is available in a
48-pin TQFP. An evaluation board is available to
ease the design effort.
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Multiplexed Outputs, I Data Bus: 2.5 Clock
Cycles
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Multiplexed Outputs, Q Data Bus: 3 Clock
Cycles
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PSRR: 90 dB
Power Consumption—Normal Operation: 267
mW (typ)
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Power Down Mode: < 1 mW (typ)
Fast Recovery Standby Mode: 30 mW (typ)
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
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