5秒后页面跳转
ADC10D1000CIUT PDF预览

ADC10D1000CIUT

更新时间: 2024-09-25 06:36:19
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
62页 2279K
描述
Low Power, 10-Bit, Dual 1.0 GSPS or Single 2.0 GSPS ADC

ADC10D1000CIUT 数据手册

 浏览型号ADC10D1000CIUT的Datasheet PDF文件第2页浏览型号ADC10D1000CIUT的Datasheet PDF文件第3页浏览型号ADC10D1000CIUT的Datasheet PDF文件第4页浏览型号ADC10D1000CIUT的Datasheet PDF文件第5页浏览型号ADC10D1000CIUT的Datasheet PDF文件第6页浏览型号ADC10D1000CIUT的Datasheet PDF文件第7页 
March 24, 2009  
ADC10D1000  
Low Power, 10-Bit, Dual 1.0 GSPS or Single 2.0 GSPS ADC  
1.0 General Description  
2.0 Features  
The ADC10D1000 is the latest advance in National's Ultra-  
High-Speed ADC family. This low-power, high-performance  
CMOS analog-to-digital converter digitizes signals at 10-bit  
resolution for dual channels at sampling rates of up to 1.0  
GSPS (Non-DES Mode) or for a single channel up to 2.0  
GSPS (DES Mode). The ADC10D1000 achieves excellent  
accuracy and dynamic performance while dissipating less  
than 2.8 Watts. The product is packaged in a leaded or lead-  
free 292-ball thermally enhanced BGA package which does  
not require a heat sink over the rated industrial temperature  
range of -40°C to +85°C.  
Excellent accuracy and dynamic performance  
Low power consumption, further reduced at lower Fs  
Internally terminated, buffered, differential analog inputs  
R/W SPI Interface for Extended Control Mode  
Dual-Edge Sampling Mode, in which the I- and Q-channels  
sample one input at twice the sampling clock rate  
Test patterns at output for system debug  
Programmable 15-bit gain and 12-bit plus sign offset  
Programmable tAD adjust feature  
1:1 non-demuxed or 1:2 demuxed LVDS outputs  
The ADC10D1000 builds upon the features, architecture and  
functionality of the 8-bit GHz family of ADCs. An expanded  
feature set includes AutoSync for multi-chip synchronization,  
15-bit programmable gain and 12-bit plus sign programmable  
offset adjustment for each channel. The improved internal  
track-and-hold amplifier and the extended self-calibration  
scheme enable a very flat response of all dynamic parameters  
beyond Nyquist, producing 9.0 Effective Number of Bits  
(ENOB) with a 498 MHz input signal and a 1.0 GHz sample  
rate while providing a 10-18 Code Error Rate (CER) Dissipat-  
ing a typical 2.77 Watts in Non-Demultiplex Mode at 1.0  
GSPS from a single 1.9 Volt supply, this device is guaranteed  
to have no missing codes over the full operating temperature  
range.  
AutoSync feature for multi-chip systems  
Single 1.9V ± 0.1V power supply  
292-ball BGA package (27mm x 27mm x 2.4mm with  
1.27mm ball-pitch); no heat sink required  
LC sampling clock filter for jitter reduction  
3.0 Key Specifications  
(Non-Demux Non-DES Mode, Fs=1.0 GSPS, Fin = 248 MHz)  
Resolution  
10 Bits  
Conversion Rate  
Dual channels at 1.0 GSPS (typ)  
Single channel at 2.0 GSPS (typ)  
Code Error Rate  
Each channel has its own independent DDR Data Clock,  
DCLKI and DCLKQ, which are in phase when both channels  
are powered up, so that only one Data Clock could be used  
to capture all data, which is sent out at the same rate as the  
input sample clock. If the 1:2 Demux Mode is selected, a sec-  
ond 10-bit LVDS bus becomes active for each channel, such  
that the output data rate is sent out two times slower to relax  
data-capture timing requirements. The part can also be used  
as a single 2.0 GSPS ADC to sample one of the I or Q inputs.  
The output formatting can be programmed to be offset binary  
or two's complement and the Low Voltage Differential Signal-  
ing (LVDS) digital outputs are compatible with IEEE  
1596.3-1996, with the exception of an adjustable common  
mode voltage between 0.8V and 1.2V to allow for power re-  
duction for well-controlled back planes.  
10-18 (typ)  
9.1 bits (typ)  
57 dB (typ)  
ENOB  
SNR  
SFDR  
Full Power Bandwidth  
DNL  
66 dBc (typ)  
2.8 GHz (typ)  
±0.25 LSB (typ)  
Power Consumption  
Single Channel Enabled  
Dual Channels Enabled  
Power Down Mode  
1.61W (typ)  
2.77W (typ)  
6 mW (typ)  
4.0 Applications  
Wideband Communications  
Data Acquisition Systems  
Digital Oscilloscopes  
5.0 Ordering Information  
Industrial Temperature Range (-40°C < TA < +85°C)  
ADC10D1000CIUT/NOPB  
NS Package  
Lead-free 292-Ball BGA Thermally Enhanced Package  
Leaded 292-Ball BGA Thermally Enhanced Package  
Reference Board  
ADC10D1000CIUT  
ADC10D1000RB  
If Military/Aerospace specified devices are required, please contract the National Semiconductor Sales Office/Dis-  
tributors for availability and specifications. IBIS models are available at: http://www.national.com/analog/adc/  
ibis_models.  
© 2009 National Semiconductor Corporation  
300663  
www.national.com  

ADC10D1000CIUT 替代型号

型号 品牌 替代类型 描述 数据表
ADC10D1000CIUT/NOPB TI

功能相似

10 位、双路 1.0GSPS 或单路 2.0GSPS 模数转换器 (ADC) | NXA
ADC12D1800CIUT TI

功能相似

12 位、双通道 1.8GSPS 或单通道 3.6GSPS 模数转换器 (ADC) | N
ADC12D1600CIUT TI

功能相似

ADC12D1000/ADC12D1600 12-Bit, 2.0/3.2 GSPS Ultra High-Speed ADC

与ADC10D1000CIUT相关器件

型号 品牌 获取价格 描述 数据表
ADC10D1000CIUT/NOPB NSC

获取价格

Low Power, 10-Bit, Dual 1.0 GSPS or Single 2.0 GSPS ADC
ADC10D1000CIUT/NOPB TI

获取价格

10 位、双路 1.0GSPS 或单路 2.0GSPS 模数转换器 (ADC) | NXA
ADC10D1000CVAL NSC

获取价格

Low Power, 10-Bit, Dual 1.0 GSPS or Single 2.0 GSPS A/DConverter
ADC10D1000NOPB NSC

获取价格

Low Power, 10-Bit, Dual 1.0/1.5 GSPS or Single 2.0/3.0 GSPS ADC
ADC10D1000QML NSC

获取价格

Low Power, 10-Bit, Dual 1.0 GSPS or Single 2.0 GSPS A/DConverter
ADC10D1000QML-SP TI

获取价格

耐辐射加固保障 (RHA)、100krad、陶瓷、10 位、双通道 1GSPS 或单通道
ADC10D1000RB NSC

获取价格

Low Power, 10-Bit, Dual 1.0/1.5 GSPS or Single 2.0/3.0 GSPS ADC
ADC10D1500 NSC

获取价格

Low Power, 10-Bit, Dual 1.0/1.5 GSPS or Single 2.0/3.0 GSPS ADC
ADC10D1500 TI

获取价格

10 位、双路 1.5GSPS 或单路 3.0GSPS 模数转换器 (ADC)
ADC10D1500CIUT NSC

获取价格

Low Power, 10-Bit, Dual 1.0/1.5 GSPS or Single 2.0/3.0 GSPS ADC