AD9882A
by adjusting Register 0x14. If series resistors are used, place
them as close as possible to the AD9882A pins but avoid adding
vias or extra length to the output trace to get the resistors closer.
PLL
Place the PLL loop filter components as close to the FILT pin as
possible.
If possible, limit the capacitance that each of the digital outputs
drives to less than 10 pF by keeping traces short and connecting
the outputs to only one device. Loading the outputs with
excessive capacitance increases the current transients inside the
AD9882A, creating more digital noise on its power supplies.
Do not place any digital or other high frequency traces near
these components.
Use the values suggested in the data sheet with 10% or smaller
tolerances.
DIGITAL INPUTS
OUTPUTS: DATA AND CLOCKS
The digital inputs on the AD9882A were designed to work with
3.3 V signals, but are tolerant of 5.0 V signals. No extra
components need to be added, if 5.0 V logic is used.
Try to minimize the trace length that the digital outputs have to
drive. Longer traces have higher capacitance and require more
current, which causes more internal digital noise.
Any noise that gets onto the Hsync input trace adds jitter to the
system. Therefore, minimize the trace length and do not run
any digital or other high frequency traces near it.
Shorter traces reduce the possibility of reflections.
Adding a series resistor with a value of 22 Ω to 100 Ω can
suppress reflections, reduce EMI, and reduce the current spikes
inside of the AD9882A. However, if 50 Ω traces are used on the
PCB, the data output should not need these resistors.
VOLTAGE REFERENCE
Bypass with a 0.1 µF capacitor. Place as close as possible to the
AD9882A pin. Make the ground connection as short as
possible.
A 22 Ω resistor on the DATACK output should provide good
impedance matching that can reduce reflections. If EMI or
current spiking is a concern, use a lower drive strength setting
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