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AD9883AKSTZ-110 PDF预览

AD9883AKSTZ-110

更新时间: 2024-11-06 23:15:55
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页数 文件大小 规格书
28页 223K
描述
110 MSPS/140 MSPS Analog Interface for Flat Panel Displays

AD9883AKSTZ-110 数据手册

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110 MSPS/140 MSPS Analog Interface  
for Flat Panel Displays  
a
AD9883A  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Industrial Temperature Range Operation  
140 MSPS Maximum Conversion Rate  
300 MHz Analog Bandwidth  
0.5 V to 1.0 V Analog Input Range  
500 ps p-p PLL Clock Jitter at 110 MSPS  
3.3 V Power Supply  
Full Sync Processing  
Sync Detect for Hot Plugging  
Midscale Clamping  
8
R
G
A/D  
A/D  
A/D  
R
OUTA  
CLAMP  
CLAMP  
CLAMP  
AIN  
8
8
AIN  
G
OUTA  
B
B
AIN  
OUTA  
Power-Down Mode  
Low Power: 500 mW Typical  
4:2:2 Output Format Mode  
MIDSCV  
HSYNC  
DTACK  
HSOUT  
VSOUT  
SOGOUT  
SYNC  
COAST  
CLAMP  
PROCESSING  
AND CLOCK  
GENERATION  
APPLICATIONS  
RGB Graphics Processing  
LCD Monitors and Projectors  
Plasma Display Panels  
Scan Converters  
FILT  
REF  
BYPASS  
REF  
SCL  
SDA  
SERIAL REGISTER  
AND  
POWER MANAGEMENT  
AD9883A  
Microdisplays  
A
0
Digital TV  
GENERAL DESCRIPTION  
140 MHz. PLL clock jitter is 500 ps p-p typical at 140 MSPS.  
When the COAST signal is presented, the PLL maintains its  
output frequency in the absence of Hsync. A sampling phase  
adjustment is provided. Data, Hsync, and clock output phase  
relationships are maintained. The AD9883A also offers full sync  
processing for composite sync and sync-on-green applications.  
The AD9883A is a complete 8-bit, 140 MSPS, monolithic analog  
interface optimized for capturing RGB graphics signals from  
personal computers and workstations. Its 140 MSPS encode  
rate capability and full power analog bandwidth of 300 MHz  
supports resolutions up to SXGA (1280 × 1024 at 75 Hz).  
The AD9883A includes a 140 MHz triple ADC with internal  
1.25 V reference, a PLL, and programmable gain, offset, and  
clamp control. The user provides only a 3.3 V power supply,  
analog input, and Hsync and COAST signals. Three-state  
CMOS outputs may be powered from 2.5 V to 3.3 V.  
A clamp signal is generated internally or may be provided by  
the user through the CLAMP input pin. This interface is fully  
programmable via a 2-wire serial interface.  
Fabricated in an advanced CMOS process, the AD9883A is pro-  
vided in a space-saving 80-lead LQFP surface-mount plastic package  
and is specified over the –40°C to +85°C temperature range.  
The AD9883A’s on-chip PLL generates a pixel clock from the  
Hsync input. Pixel clock output frequencies range from 12 MHz to  
REV. B  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  

AD9883AKSTZ-110 替代型号

型号 品牌 替代类型 描述 数据表
AD9883ABST-RL140 ADI

完全替代

110 MSPS/140 MSPS Analog Interface for Flat Panel Displays
AD9883ABST-RL110 ADI

完全替代

110 MSPS/140 MSPS Analog Interface for Flat Panel Displays

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