Datasheet > AD9821

AD9821

更新时间： 2024-01-25 16:07:13

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
16页	269K
描述
Complete 12-Bit 40 MSPS Imaging Signal Processor

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AD9821 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	1.40 MM, PLASTIC, MS-026BBC, LQFP-48	针数：	48
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.31.00.01	风险等级：	5.8
最大模拟输入电压：	1.8 V	最小模拟输入电压：
转换器类型：	ADC, PROPRIETARY METHOD	JESD-30 代码：	S-PQFP-G48
JESD-609代码：	e3	长度：	7 mm
湿度敏感等级：	3	模拟输入通道数量：	1
位数：	12	功能数量：	1
端子数量：	48	最高工作温度：	85 °C
最低工作温度：	-20 °C	输出位码：	BINARY
输出格式：	PARALLEL, WORD	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP48,.35SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	260	电源：	3 V
认证状态：	Not Qualified	采样速率：	40 MHz
采样并保持/跟踪并保持：	SAMPLE	座面最大高度：	1.6 mm
子类别：	Other Converters	标称供电电压：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	OTHER	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	40
宽度：	7 mm

AD9821

Internal Power-On Reset Circuitry

respective ground pins. All decoupling capacitors should be

located as close as possible to the package pins. A single clean

power supply is recommended for the AD9821, but a separate

digital driver supply may be used for DRVDD (Pin 13). DRVDD

should always be decoupled to DRVSS (Pin 14), which should

be connected to the analog ground plane. Advantages of using a

separate digital driver supply include using a lower voltage (2.7 V)

to match levels with a 2.7 V ASIC, reducing digital power

dissipation, and reducing potential noise coupling. If the

digital outputs (Pins 1–12) must drive a load larger than 20 pF,

buffering is recommended to reduce digital code transition noise.

Alternatively, placing series resistors close to the digital output

pins may also help reduce noise.

After power-on, the AD9821 will automatically reset all internal

registers and perform internal calibration procedures. This takes

approximately 1 ms to complete. During this time, normal clock

signals and serial write operations may occur. However, serial

is completed.

Grounding and Decoupling Recommendations

As shown in Figure 13, a single ground plane is recommended

for the AD9821. This ground plane should be as continuous as

possible, particularly around Pins 25 through 39. This will ensure

that all analog decoupling capacitors provide the lowest possible

impedance path between the power and bypass pins and their

–14–

REV. 0

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