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AD9824KCPRL PDF预览

AD9824KCPRL

更新时间: 2024-11-06 21:18:27
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 419K
描述
IC SPECIALTY ANALOG CIRCUIT, QCC48, LFCSP-48, Analog IC:Other

AD9824KCPRL 数据手册

 浏览型号AD9824KCPRL的Datasheet PDF文件第2页浏览型号AD9824KCPRL的Datasheet PDF文件第3页浏览型号AD9824KCPRL的Datasheet PDF文件第4页浏览型号AD9824KCPRL的Datasheet PDF文件第5页浏览型号AD9824KCPRL的Datasheet PDF文件第6页浏览型号AD9824KCPRL的Datasheet PDF文件第7页 
Complete 14-Bit 30 MSPS  
CCD Signal Processor  
a
AD9824  
PRODUCT DESCRIPTION  
FEATURES  
The AD9824 is a complete analog signal processor for CCD  
applications. It features a 30 MHz single-channel architecture  
designed to sample and condition the outputs of interlaced and  
progressive scan area CCD arrays. The AD9824’s signal chain  
consists of an input clamp, a correlated double sampler (CDS),  
PxGA, a digitally controlled VGA, a black level clamp, and a  
14-bit A/D converter. Additional input modes are also pro-  
vided for processing analog video signals.  
14-Bit 30 MSPS A/D Converter  
30 MSPS Correlated Double Sampler (CDS)  
4 dB 6 dB 6-Bit Pixel Gain Amplifier (PxGA®)  
2 dB to 36 dB 10-Bit Variable Gain Amplifier (VGA)  
Low Noise Clamp Circuits  
Analog Preblanking Function  
Auxiliary Inputs with VGA and Input Clamp  
3-Wire Serial Digital Interface  
3 V Single-Supply Operation  
Low Power: 153 mW @ 3 V Supply  
Space-Saving 48-Lead LFCSP Package  
The internal registers are programmed through a 3-wire  
serial digital interface. Programmable features include gain  
adjustment, black level adjustment, input configuration, and  
power-down modes.  
APPLICATIONS  
High Performance Digital Still Cameras  
Industrial/Scientific Imaging  
The AD9824 operates from a single 3 V power supply, typically  
dissipates 153 mW, and is packaged in a 48-lead LFCSP.  
FUNCTIONAL BLOCK DIAGRAM  
AVDD  
AVSS  
HD  
VD  
VRT  
VRB  
PBLK  
DRVDD  
DRVSS  
COLOR  
BAND GAP  
STEERING  
REFERENCE  
4dB 6dB  
PxGA  
2dB~36dB  
VGA  
CDS  
CCDIN  
14  
2:1  
MUX  
ADC  
CLP  
DOUT  
CLP  
6
CLPDM  
AUX1IN  
10  
CLPOB  
2:1  
MUX  
BUF  
AUX2IN  
BLK CLAMP  
LEVEL  
8
CONTROL  
REGISTERS  
CLP  
DVDD  
DVSS  
DIGITAL  
INTERFACE  
INTERNAL  
TIMING  
AD9824  
SL  
SCK  
SDATA  
SHP  
SHD DATACLK  
PxGA is a registered trademark of Analog Devices, Inc.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2002  

AD9824KCPRL 替代型号

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