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AD9550BCPZ-REEL7 PDF预览

AD9550BCPZ-REEL7

更新时间: 2024-02-08 11:38:50
品牌 Logo 应用领域
亚德诺 - ADI 通信时钟
页数 文件大小 规格书
20页 393K
描述
Integer-N Clock Translator for Wireline Communications

AD9550BCPZ-REEL7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.77
应用程序:SONET;SDHJESD-30 代码:S-XQCC-N32
JESD-609代码:e3长度:5 mm
湿度敏感等级:1功能数量:1
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC32,.2SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified座面最大高度:0.8 mm
子类别:Other Telecom ICs最大压摆率:0.185 mA
标称供电电压:3.3 V表面贴装:YES
技术:CMOS电信集成电路类型:ATM/SONET/SDH SUPPORT CIRCUIT
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:5 mmBase Number Matches:1

AD9550BCPZ-REEL7 数据手册

 浏览型号AD9550BCPZ-REEL7的Datasheet PDF文件第14页浏览型号AD9550BCPZ-REEL7的Datasheet PDF文件第15页浏览型号AD9550BCPZ-REEL7的Datasheet PDF文件第16页浏览型号AD9550BCPZ-REEL7的Datasheet PDF文件第18页浏览型号AD9550BCPZ-REEL7的Datasheet PDF文件第19页浏览型号AD9550BCPZ-REEL7的Datasheet PDF文件第20页 
AD9550  
APPLICATIONS INFORMATION  
THERMAL PERFORMANCE  
Table 11. Thermal Parameters for the 32-Lead LFCSP  
Symbol Description  
Value1 Unit  
The AD9550 is specified for case temperature (TCASE). To ensure  
that TCASE is not exceeded, use an airflow source.  
θJA  
Junction-to-ambient thermal  
41.6  
36.4  
32.6  
24.2  
22.9  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
resistance, 0 m/sec airflow per  
JEDEC JESD51-2 (still air)  
The following equation determines the junction temperature on  
the application printed circuit board (PCB):  
θJMA  
θJMA  
θJB  
Junction-to-ambient thermal  
resistance, 1.0 m/sec airflow per  
JEDEC JESD51-6 (moving air)  
Junction-to-ambient thermal  
resistance, 2.5 m/sec airflow per  
JEDEC JESD51-6 (moving air)  
Junction-to-board thermal  
resistance, 0 m/sec airflow per  
JEDEC JESD51-8 (still air)  
TJ = TCASE + (ΨJT × PD)  
where:  
TJ is the junction temperature (°C).  
T
CASE is the case temperature (°C) measured by the customer  
at the top center of the package.  
JT is the value indicated in Table 11.  
Ψ
PD is the power dissipation (see Table 1 for the power  
ΨJB  
Junction-to-board characterization  
parameter, 0 m/sec airflow per  
JEDEC JESD51-6 (still air)  
consumption parameters).  
Values of θ are provided for package comparison and PCB design  
JA  
considerations. θJA can be used for a first-order approximation  
of TJ using the following equation:  
θJC  
ΨJT  
Junction-to-case thermal resistance  
Junction-to-top-of-package  
characterization parameter, 0 m/sec  
airflow per JEDEC JESD51-2 (still air)  
4.8  
0.5  
°C/W  
°C/W  
TJ = TA + (θJA × PD)  
where TA is the ambient temperature (°C).  
1 Results are from simulations. The PCB is a JEDEC multilayer type. Thermal  
performance for actual applications requires careful inspection of the  
conditions in the application to determine whether they are similar to those  
assumed in these calculations.  
Values of θ are provided for package comparison and PCB  
JC  
design considerations when an external heat sink is required.  
Values of θ are provided for package comparison and PCB  
JB  
design considerations.  
Rev. 0 | Page 17 of 20  
 
 
 
 

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