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AD9281-EB PDF预览

AD9281-EB

更新时间: 2024-10-27 22:25:23
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
19页 410K
描述
Dual Channel 8-Bit Resolution CMOS ADC

AD9281-EB 数据手册

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Dual Channel 8-Bit  
a
Resolution CMOS ADC  
AD9281  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Complete Dual Matching ADC  
Low Power Dissipation: 225 mW (+3 V Supply)  
Single Supply: 2.7 V to 5.5 V  
Differential Nonlinearity Error: 0.1 LSB  
On-Chip Analog Input Buffers  
On-Chip Reference  
Signal-to-Noise Ratio: 49.2 dB  
Over Seven Effective Bits  
Spurious-Free Dynamic Range: –65 dB  
No Missing Codes Guaranteed  
28-Lead SSOP  
AVDD AVSS  
DVDD DVSS  
CLOCK  
IINA  
IINB  
I
SLEEP  
AD9281  
"I" ADC  
REGISTER  
SELECT  
REFERENCE  
BUFFER  
IREFB  
IREFT  
THREE-  
QREFB  
QREFT  
ASYNCHRONOUS  
MULTIPLEXER  
STATE  
OUTPUT  
BUFFER  
DATA  
8 BITS  
VREF  
1V  
REFSENSE  
CHIP  
SELECT  
QINB  
QINA  
Q
"Q" ADC  
REGISTER  
PRODUCT DESCRIPTION  
PRODUCT HIGHLIGHTS  
The AD9281 is a complete dual channel, 28 MSPS, 8-bit  
CMOS ADC. The AD9281 is optimized specifically for applica-  
tions where close matching between two ADCs is required (e.g.,  
I/Q channels in communications applications). The 28 MHz  
sampling rate and wide input bandwidth will cover both narrow-  
band and spread-spectrum channels. The AD9281 integrates  
two 8-bit, 28 MSPS ADCs, two input buffer amplifiers, an internal  
voltage reference and multiplexed digital output buffers.  
1. Dual 8-Bit, 28 MSPS ADC  
A pair of high performance 28 MSPS ADCs that are opti-  
mized for spurious free dynamic performance are provided for  
encoding of I and Q or diversity channel information.  
2. Low Power  
Complete CMOS Dual ADC function consumes a low  
225 mW on a single supply (on 3 V supply). The AD9281  
operates on supply voltages from 2.7 V to 5.5 V.  
Each ADC incorporates a simultaneous sampling sample-and-  
hold amplifier at its input. The analog inputs are buffered; no  
external input buffer op amp will be required in most applica-  
tions. The ADCs are implemented using a multistage pipeline  
architecture that offers accurate performance and guarantees no  
missing codes. The outputs of the ADCs are ported to a multi-  
plexed digital output buffer.  
3. On-Chip Voltage Reference  
The AD9281 includes an on-chip compensated bandgap  
voltage reference pin programmable for 1 V or 2 V.  
4. On-chip analog input buffers eliminate the need for external  
op amps in most applications.  
5. Single 8-Bit Digital Output Bus  
The AD9281 ADC outputs are interleaved onto a single  
output bus saving board space and digital pin count.  
The AD9281 is manufactured on an advanced low cost CMOS  
process, operates from a single supply from 2.7 V to 5.5 V, and  
consumes 225 mW of power (on 3 V supply). The AD9281  
input structure accepts either single-ended or differential signals,  
providing excellent dynamic performance up to and beyond  
14 MHz Nyquist input frequencies.  
6. Small Package  
The AD9281 offers the complete integrated function in a  
compact 28-lead SSOP package.  
7. Product Family  
The AD9281 dual ADC is pin compatible with a dual 10-bit  
ADC (AD9201).  
REV. E  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1999  

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