PRELIMINARYTECHNICALDATA
2-Channel, 2.35 V to 5.25 V
a
Preliminary Technical Data
1MSPS,10-/12-BitADCs
AD7912/AD7922
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
Fast Throughput Rate: 1MSPS
Specified for VDD of 2.35 V to 5.25 V
Low Power:
3.6 mW typ at 1MSPS with 3V Supplies
12.5mW typ at 1MSPS with 5V Supplies
Wide Input Bandwidth:
DD
10-/12-BIT
V
V
SUCCESSIVE
APPROXIMATION
ADC
IN1
MUX
T/H
IN2
71dB SNR at 100kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface
SPITM/QSPITM/MICROWIRETM/DSPCompatible
Standby Mode: 1µA max
SCLK
CONTROL
LOGIC
DOUT
DIN
AD7912/AD7922
Daisy Chain mode
8-Lead TSOT Package
GND
8-Lead MSOP Package
Chain configuration. The Daisy Chain mode allows the
user to read the conversion result from the ADCs
contained in the chain.
APPLICATIONS
Battery-Powered Systems
Personal Digital Assistants
Medical Instruments
MobileCommunications
Instrumentation and Control Systems
Data Acquisition Systems
High-SpeedModems
The AD7912/AD7922 use advanced design techniques to
achieve very low power dissipation at high throughput
rates.
The reference for the part is taken internally from VDD.
This allows the widest dynamic input range to the ADC.
Thus the analog input range for the part is 0 to VDD. The
conversion rate is determined by the SCLK signal.
Optical Sensors
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD7912/AD7922 are 10-bit and 12-bit, high speed,
low power, 2-channel successive-approximation ADCs
respectively. The parts operate from a single 2.35 V to
5.25 V power supply and feature throughput rates up to 1
MSPS. The parts contain a low-noise, wide bandwidth
track/hold amplifier which can handle input frequencies in
excess of 13MHz.
1. 2-Channel, 1MSPS, 10-/12-bit ADCs in TSOT
package.
2. High Throughput with Low Power Consumption.
3. Flexible Power/Serial Clock Speed Management.
The conversion rate is determined by the serial clock
allowing the conversion time to be reduced through the
serial clock speed increase. This allows the average
power consumption to be reduced when a power-down
mode is used while not converting. The part also
features a Power Down mode to maximize power effi-
ciency at lower throughput rates. Current consumption is
1µA max and 50nA typically when in Power Down
mode.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to
interface with microprocessors or DSPs. The input signal
is sampled on the falling edge of CS and the conversion is
also initiated at this point. There are no pipeline delays
associated with the part.
The channel to be converted is selected through the DIN
pin and the mode of operation is controlled by CS. The
serial data stream from the DOUT pin has a channel
identifier bit and a mode identifier bit, which provide
information about the channel converted and the current
mode of operation.
4. Daisy Chain mode.
5. Reference derived from the power supply.
6. No Pipeline Delay.
The parts feature a standard successive-approximation
ADC with accurate control of the sampling instant via a
CS input and once-off conversion control.
As a result of the Daisy Chain mode of operation, several
AD7912/AD7922 can be connected together in Daisy
REV. PrE (06/03)
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights ofAnalog Devices.Trademarks
and registered trademarks are the property of their respective companies.
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Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
Analog Devices, Inc., 2003