Differential Input, Quad,14-Bit,
Simultaneous Sampling, SAR ADC
Data Sheet
AD7381-4
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
REFIO
REFCAP REFGND
V
LOGIC
CC
14-bit ADC family
Quad simultaneous sampling
Fully differential analog inputs
Wide common-mode range
High throughput rate: 4 MSPS
Buffered 2.5 V internal voltage reference (10 ppm/°C maximum)
On-chip oversampling function
INL (maximum): 1.5 LSB
SNR (typical)
85.3 dB at VREF = 3.3 V
90.6 dB at OSR = 8× rolling average oversampling, RES = 1
2-bit resolution boost
REGCAP
LDO
REF
A
A
A+
A–
IN
OSC
ADC A
OVERSAMPLING
IN
SDOA
SDOB
SDOC
A
A
B+
B–
IN
OVERSAMPLING
OVERSAMPLING
OVERSAMPLING
ADC B
ADC C
IN
INTERFACE
AND
CONTROL
LOGIC
SDOD/
ALERT
A
A
C+
C–
IN
SCLK
SDI
IN
CS
A
A
D+
D–
IN
ADC D
GND
ALERT
AD7381-4
Out of range indicator (
)
IN
High-speed serial interface
−40°C to +125°C operation
4 mm × 4 mm, 24-lead LFCSP
GND
Figure 1.
APPLICATIONS
Motor control position feedback
Motor control current sense
Data acquisition systems
Erbium doped fiber amplifier (EDFA) applications
In phase and quadrature demodulation
GENERAL DESCRIPTION
The AD7381-4 a 16-bit, quad, simultaneous sampling, high
speed, successive approximation register (SAR), analog-to-digital
converter (ADC) that operates from a 3.0 V to 3.6 V power
supply and features throughput rates up to 4 MSPS. The analog
input type is differential, accepts a wide common-mode input
voltage, and the analog inputs are sampled and converted on
The AD7381-4 is available in a 24-lead lead frame chip scale
package (LFCSP) with operation specified from −40°C to +125°C.
Table 1. Related Devices
No. of Channels
Input Type
16 Bits
14 Bits
4
Differential
AD7380-4
AD7389-4
AD7380
AD4680
AD4681
AD7386
AD7381-4
CS
the falling edge of
.
2
Differential
AD7381
AD7387
The AD7381-4 has on-chip oversampling blocks to improve
dynamic range and reduce noise at lower bandwidths. The
oversampling can boost up to two bits of added resolution. A
buffered internal 2.5 V reference (10 ppm/°C) is included.
Alternatively, an external reference up to 3.3 V can be used.
Single-ended
PRODUCT HIGHLIGHTS
The conversion process and data acquisition use standard
control inputs allowing for easy interfacing to microprocessors
or digital signal processors (DSPs). The conversion result can
clock out simultaneously via 4-wire mode for faster throughput
or via 1-wire serial mode when slower throughput is allowed.
The device is compatible with 1.8 V, 2.5 V, and 3.3 V interfaces,
using the separate logic supply.
1. Quad simultaneous sampling and conversion.
2. Pin-compatible product family.
3. High throughput rate, 4 MSPS at 14-bit.
4. Space-saving, 4 mm × 4 mm LFCSP.
5. Integrated oversampling block to increase dynamic range,
reduce noise and reduce SCLK speed requirements.
6. Differential analog inputs with wide common-mode range.
7. Small sampling capacitor reduces amplifier drive burden.
Rev. 0
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