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AD698APZ PDF预览

AD698APZ

更新时间: 2024-02-27 12:36:12
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
12页 235K
描述
Universal LVDT Signal Conditioner

AD698APZ 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:24
Reach Compliance Code:unknown风险等级:5.88
最大模拟输入电压:3.5 V转换器类型:SIGNAL CONDITIONER
JESD-30 代码:R-GDIP-T24JESD-609代码:e0
湿度敏感等级:NOT APPLICABLE最大负电源电压:-18 V
最小负电源电压:-6.5 V标称负供电电压:-15 V
功能数量:1端子数量:24
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE认证状态:COMMERCIAL
座面最大高度:5.08 mm信号/输出频率:20000 Hz
最大供电电压:18 V最小供电电压:6.5 V
标称供电电压:15 V表面贴装:NO
温度等级:MILITARY端子面层:TIN LEAD
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:15.24 mmBase Number Matches:1

AD698APZ 数据手册

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AD698  
TH EO RY O F O P ERATIO N  
gain error in the output. T he AD698, eliminates these errors by  
calculating the ratio of the LVDT output to its input excitation in  
order to cancel out any drift effects. T his device differs from the  
AD598 LVDT signal conditioner in that it implements a different  
circuit transfer function and does not require the sum of the LVDT  
secondaries (A + B) to be constant with stroke length.  
A block diagram of the AD698 along with an LVDT (linear  
variable differential transformer) connected to its input is shown  
in Figure 5 below. T he LVDT is an electromechanical trans-  
ducer—its input is the mechanical displacement of a core, and  
its output is an ac voltage proportional to core position. T wo  
popular types of LVDT s are the half-bridge type and the series  
opposed or four-wire LVDT . In both types the moveable core  
couples flux between the windings. T he series-opposed con-  
nected LVDT transducer consists of a primary winding ener-  
gized by an external sine wave reference source and two  
secondary windings connected in the series opposed configuration.  
T he output voltage across the series secondary increases as the core  
is moved from the center. T he direction of movement is detected  
by measuring the phase of the output. Half-bridge LVDT s have a  
single coil with a center tap and work like an autotransformer. T he  
excitation voltage is applied across the coil; the voltage at the center  
tap is proportional to position. T he device behaves similarly to a  
resistive voltage divider.  
T he AD698 block diagram is shown below. T he inputs consist  
of two independent synchronous demodulation channels. T he B  
channel is designed to monitor the drive excitation to the LVDT .  
T he full wave rectified output is filtered by C2 and sent to the  
computational circuit. Channel A is identical except that the  
comparator is pinned out separately. Since the A channel may  
reach 0 V output at LVDT null, the A channel demodulator is  
usually triggered by the primary voltage (B Channel). In addi-  
tion, a phase compensation network may be required to add a  
phase lead or lag to the A Channel to compensate for the LVDT  
primary to secondary phase shift. For half-bridge circuits the  
phase shift is noncritical, and the A channel voltage is large  
enough to trigger the demodulator.  
C2  
+V  
VOLTAGE  
REFERENCE  
BFILT1  
BFILT2  
S
AMP  
OSCILLATOR  
B
C5  
R2  
AD698  
CHANNEL  
B
–BIN  
+BIN  
±1  
A
B
V/I  
OUT  
FILTER  
FILTER  
FB  
AMP  
V
OUT  
C4  
FILTER  
A
COMP  
DUTY CYCLE  
DIVIDER  
A/B = 1 = 100%  
DUTY  
A
B
–ACOMP  
COMP  
V/I  
Figure 5. Functional Block Diagram  
+ACOMP  
–AIN  
OFF 1  
OFF 2  
FILTER  
T he AD698 energizes the LVDT coil, senses the LVDT output  
voltages and produces a dc output voltage proportional to core  
position. T he AD698 has a sine wave oscillator and power am-  
plifier to drive the LVDT . T wo synchronous demodulation  
stages are available for decoding the primary and secondary  
voltages. A decoder determines the ratio of the output signal  
voltage to the input drive voltage (A/B). A filter stage and out-  
put amplifier are used to scale the resulting output.  
IREF  
500µA  
V
±1  
+AIN  
DEMODULATOR  
AD698  
A
CHANNEL  
AFILT1  
AFILT2  
–V  
S
C3  
Figure 6. AD698 Block Diagram  
T he oscillator comprises a multivibrator that produces a triwave  
output. T he triwave drives a sine shaper that produces a low dis-  
tortion sine wave. Frequency and amplitude are determined by a  
single resistor and capacitor. Output frequency can range from  
20 Hz to 20 kHz and amplitude from 2 V to 24 V rms. T otal har-  
monic distortion is typically –50 dB.  
Once both channels are demodulated and filtered a division cir-  
cuit, implemented with a duty cycle multiplier, is used to calcu-  
late the ratio A/B. T he output of the divider is a duty cycle.  
When A/B is equal to 1, the duty cycle will be equal to 100%.  
(T his signal can be used as is if a pulse width modulated output  
is required.) T he duty cycle drives a circuit that modulates and  
filters a reference current proportional to the duty cycle. T he  
output amplifier scales the 500 µA reference current converting  
it to a voltage. T he output transfer function is thus:  
T he AD698 decodes LVDT s by synchronously demodulating  
the amplitude modulated input (secondaries), A, and a fixed in-  
put reference (primary or sum of secondaries or fixed input), B.  
A common problem with earlier solutions was that any drift in  
the amplitude of the drive oscillator corresponded directly to a  
VOUT = IREF × A/B × R2, where IREF = 500 µA  
REV. B  
–5–  

AD698APZ 替代型号

型号 品牌 替代类型 描述 数据表
AD698AP ADI

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