AD694
Model
AD694JN/AQ/AR
AD694BQ/BR
Typ
Min
Typ
Max
Min
Max
Units
BUFFER AMPLIFIER6
Input Offset Voltage
Initial Offset
±150
±2
90
؎500
±3
±50
±2
90
؎500
±3
µV
µV/°C
dB
TMIN to TMAX
vs. Supply
80
80
vs. Common Mode
80
90
80
90
dB
Trim Range
؎2.5
±4.0
؎2.5
±4.0
mV
Frequency Response
Unity Gain, Small Signal
Input Voluge Noise (0.1 Hz to 10 Hz)
Open-Loop Gain
300
2
300
2
kHz
µV p-p
VO = +10 V, RL ≥ 10 kΩ
Output Voltage @ Pin 1, FB1
Minimum Output Voltage
Maximum Output Voltage
50
50
V/mV
1.0
VS–2 V
10
1.0
10
mV
V
VS–2.5 V
VS–2.5 V VS–2 V
NOTES
1The single supply op amps of the AD694, lacking pull down current, may not reach 0.000 V at their outputs. For this reason, span, offset, and nonlinearity are
specified with the input amplifiers operating in their linear range. The input voltage used for the tests is 5 mV to 2 V and 5 mV to 10 V for the two precalibrated
input ranges. Span and zero accuracy are tested with the buffer amplifier configured as a follower.
2Offset at 4 mA out and 0 mA out are extrapolated to 0.000 V input from measurements made at 5 mV and at full scale. See Note 1.
3Nonlinearity is specified as the maximum deviation of the output, as a % of span, from a straight line drawn through the endpoints of the transfer function.
4Voltage reference drift guaranteed by the Box Method. The voltage reference output over temperature will fall inside of a box whose length is determined by the
temperature range and whose height is determined by the maximum temperature coefficient multiplied by the temperature span in degrees C.
5Devices tested at these temperatures with a pass transistor. Allowable temperature range of operation is dependent upon internal power dissipation. Absolute
maximum junction and case temperature should not be exceeded. See section: “Power Dissipation Considerations.”
6Buffer amplifier specs for reference. Buffer amplifier offset and drift already included in Span and Zero accuracy specs above.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
Transistor Count: . . . . . . . . . . . . . . . . . . . . .75 Active Devices
Substrate Connection: . . . . . . . . . . . . . . . . . . . . to Com, Pin 5
Thermal Characteristics:
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +36 V
VS to IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +36 V
Input Voltage, (Either Input Pin 2 or 3) . . . . .–0.3 V to +36 V
Reference Short Circuit to Common . . . . . . . . . . . . Indefinite
Alarm Voltage, Pin 10 . . . . . . . . . . . . . . . . . . . . . . . . . . +36 V
4 mA Adj, Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +1 V
4 mA On/Off, Pin 9 . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 36 V
Storage Temperature Range
Plastic (N) Package: θJC = 50°C/Watt
θCA (Still Air) = 85°C/Watt
Cerdip (Q) Package: θJC = 30°C/Watt
θCA (Still Air) = 70°C/Watt
Plastic (R) Package: θJC = 27°C/Watt
θCA (Still Air) = 73°C/Watt
AD694Q . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
AD694N, R . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Lead Temperature, 10 sec Soldering . . . . . . . . . . . . . . +300°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . +150°C
Maximum Case Temperature
ESD Susceptibility
All pins are rated for a minimum of 4000 V protection, except
for Pins 2, 3 and 9 which are rated to survive a minimum of
1500 V. ESD testing conforms to Human Body Model. Always
practice ESD prevention.
Plastic Package (N, R) . . . . . . . . . . . . . . . . . . . . . . . +125°C
Cerdip Package (Q) . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
No pin, other than IOUT (11) and ±Sig (2), (3) as noted, may be permitted to become more negative than Com (5). No pin may be
permitted to become more positive than VS (13).
PIN CONFIGURATION (N, R, Q PACKAGE)
ORDERING GUIDE
Temperature
Range
Package
Option*
Model
AD694JN
AD694AQ
AD694AR
AD694BQ
AD694BR
0°C to +70°C
N-16
Q-16
R-16
Q-16
R-16
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
*N = Plastic DIP; Q = Cerdip, R = SOIC.
REV. A
–3–