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AD5621AKSZ-REEL7 PDF预览

AD5621AKSZ-REEL7

更新时间: 2024-02-28 05:28:57
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 466K
描述
2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70

AD5621AKSZ-REEL7 数据手册

 浏览型号AD5621AKSZ-REEL7的Datasheet PDF文件第1页浏览型号AD5621AKSZ-REEL7的Datasheet PDF文件第2页浏览型号AD5621AKSZ-REEL7的Datasheet PDF文件第4页浏览型号AD5621AKSZ-REEL7的Datasheet PDF文件第5页浏览型号AD5621AKSZ-REEL7的Datasheet PDF文件第6页浏览型号AD5621AKSZ-REEL7的Datasheet PDF文件第7页 
Data Sheet  
AD5601/AD5611/AD5621  
SPECIFICATIONS  
VDD = 2.7 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted. Temperature range  
for A/B grades is −40°C to +125°C, typical at 25°C.  
Table 2.  
A Grade  
Min Typ  
B Grade  
Min Typ  
Parameter  
Max  
Max  
Unit  
Test Conditions/Comments  
STATIC PERFORMANCE  
AD5601  
Resolution  
8
Bits  
LSB  
LSB  
Relative Accuracy1 (INL)  
Differential Nonlinearity (DNL)  
AD5611  
0.5  
0.5  
Guaranteed monotonic by design  
Guaranteed monotonic by design  
Resolution  
10  
12  
Bits  
LSB  
LSB  
Relative Accuracy1 (INL)  
Differential Nonlinearity (DNL)  
AD5621  
4
0.5  
0.5  
0.5  
Resolution  
Bits  
LSB  
LSB  
mV  
mV  
mV  
Relative Accuracy1 (INL)  
Differential Nonlinearity (DNL)  
Zero-Code Error  
Full-Scale Error  
6
0.5  
10  
1
0.5  
10  
Guaranteed monotonic by design  
All 0s loaded to DAC register  
All 1s loaded to DAC register  
0.5  
0.5  
0.063  
0.5  
0.5  
0.063  
Offset Error  
10  
10  
Gain Error  
Zero-Code Error Drift  
Gain Temperature Coefficient  
0.0004  
5.0  
0.037  
0.0004  
5.0  
0.037 %FSR  
µV/°C  
2.0  
2.0  
ppm  
FSR/°C  
OUTPUT CHARACTERISTICS2  
Output Voltage Range  
Output Voltage Settling Time  
Slew Rate  
0
VDD  
10  
0
VDD  
10  
V
µs  
V/µs  
pF  
pF  
6
6
Code ¼ scale to ¾ scale  
0.5  
470  
1000  
120  
2
0.5  
470  
1000  
120  
2
Capacitive Load Stability  
RL = ∞  
RL = 2 kΩ  
DAC code = midscale,1 kHz  
Output Noise Spectral Density  
Noise  
nV/Hz  
µV  
DAC code = midscale,  
0.1 Hz to 10 kHz bandwidth  
Digital-to-Analog Glitch Impulse  
Digital Feedthrough  
Short-Circuit Current  
DC Output Impedance  
LOGIC INPUTS  
5
5
nV-s  
nV-s  
mA  
Ω
1 LSB change around major carry  
0.2  
15  
0.5  
0.2  
15  
0.5  
VDD = 3 V/5 V  
Input Current3  
2
2
µA  
V
V
V
V
Input High Voltage, VINH  
1.8  
1.4  
1.8  
1.4  
VDD = 4.7 V to 5.5 V  
VDD = 2.7 V to 3.6 V  
VDD = 4.7 V to 5.5 V  
VDD = 2.7 V to 3.6 V  
Input Low Voltage, VINL  
Pin Input Capacitance  
0.8  
0.6  
0.8  
0.6  
3
3
pF  
Rev. G | Page 3 of 24  
 
 

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