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AD5554

更新时间: 2024-11-05 22:49:59
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 472K
描述
Quad, Current-Output Serial-Input, 16-Bit/14-Bit DACs

AD5554 数据手册

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Quad, Current-Output  
Serial-Input, 16-Bit/14-Bit DACs  
a
AD5544/AD5554  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
AD5544 16-Bit Resolution  
AD5554 14-Bit Resolution  
2 mA Full-Scale Current 20%, with VREF = 10 V  
2 s Settling Time  
VSS BIAS for Zero-Scale Error Reduction @ Temp  
Midscale or Zero-Scale Reset  
Four Separate 4Q Multiplying Reference Inputs  
SPI-Compatible 3-Wire Interface  
Double Buffered Registers Enable  
Simultaneous Multichannel Change  
Internal Power ON Reset  
V
A B C D  
DAC A  
REF  
V
DD  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D8  
R
FB  
A
SDO  
INPUT  
REGISTER  
DAC A  
REGISTER  
I A  
OUT  
R
R
R
R
R
R
R
R
A
R
A
GND  
B
FB  
INPUT  
REGISTER  
DAC B  
REGISTER  
16  
D9  
DAC B  
DAC C  
I B  
OUT  
D10  
D11  
D12  
D13  
D14  
D15  
A0  
A B  
GND  
R
I
C
C
FB  
INPUT  
REGISTER  
DAC C  
REGISTER  
Compact SSOP-28 Package  
OUT  
SDI  
A1  
A C  
GND  
APPLICATIONS  
Automatic Test Equipment  
Instrumentation  
CS  
R
I
D
FB  
CLK  
EN  
INPUT  
REGISTER  
DAC D  
REGISTER  
D
OUT  
DAC D  
DAC  
A
Digitally-Controlled Calibration  
B
C
D
A D  
GND  
2:4  
POWER-  
ON  
AD5544  
DECODE  
A
GND  
F
RESET  
DGND  
RS  
MSB  
LDAC  
V
SS  
GENERAL DESCRIPTION  
The AD5544/AD5554 quad, 16-/14-bit, current-output, digital-  
to-analog converters are designed to operate from a single 5 V  
supply.  
1.0  
0.5  
0.0  
DAC A  
DAC B  
DAC C  
DAC D  
The applied external reference input voltage (VREF) determines  
the full-scale output current. Integrated feedback resistors (RFB  
provide temperature-tracking, full-scale voltage outputs when  
combined with an external I-to-V precision amplifier.  
)
–0.5  
–1.0  
1.0  
0.5  
0.0  
A doubled-buffered serial-data interface offers high-speed,  
3-wire, SPI- and microcontroller-compatible inputs using  
serial-data-in (SDI), clock (CLK), and a chip-select (CS). In  
addition, a serial-data-out pin (SDO) allows for daisy-chaining  
when multiple packages are used. A common level-sensitive  
load-DAC strobe (LDAC) input allows simultaneous update of  
all DAC outputs from previously loaded input registers. Addi-  
tionally, an internal power ON reset forces the output voltage to  
zero at system turn ON. An MSB pin allows system reset asser-  
tion (RS) to force all registers to zero code when MSB = 0, or  
to half-scale code when MSB = 1.  
–0.5  
–1.0  
1.0  
0.5  
0.0  
–0.5  
–1.0  
1.0  
0.5  
0.0  
AD5544/AD5554 are packaged in the compact SSOP-28.  
–0.5  
–1.0  
0
8192 16384 24576 32768 40960 49152 57344 65536  
CODE – Decimal  
Figure 1. AD5544 INL vs. Code Plot (TA = 25°C)  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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