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AD5533ABCZ-1

更新时间： 2024-02-27 13:55:48
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
16页 312K
描述
IC SAMPLE AND HOLD AMPLIFIER, PBGA74, 12 X 12 MM, LFBGA-74, Sample and Hold Circuit

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AD5533ABCZ-1 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：LBGA,针数：74
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.35
最长采集时间：16 µs放大器类型：SAMPLE AND HOLD CIRCUIT
最大模拟输入电压：3 V最小模拟输入电压：
JESD-30 代码：S-PBGA-B74JESD-609代码：e1
长度：12 mm湿度敏感等级：3
功能数量：1端子数量：74
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LBGA
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
采样并保持/跟踪并保持：SAMPLE座面最大高度：1.7 mm
供电电压上限：7 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：TIN SILVER COPPER端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：12 mm
Base Number Matches：1

AD5533ABCZ-1 数据手册

 浏览型号AD5533ABCZ-1的Datasheet PDF文件第10页浏览型号AD5533ABCZ-1的Datasheet PDF文件第11页浏览型号AD5533ABCZ-1的Datasheet PDF文件第12页浏览型号AD5533ABCZ-1的Datasheet PDF文件第13页浏览型号AD5533ABCZ-1的Datasheet PDF文件第14页浏览型号AD5533ABCZ-1的Datasheet PDF文件第16页 
AD5533  
APPLICATION CIRCUITS  
POWER SUPPLY DECOUPLING  
AD5533 in a Typical ATE System  
In any circuit where accuracy is important, careful consideration  
of the power supply and ground return layout helps to ensure  
the rated performance. The printed circuit board on which the  
AD5533 is mounted should be designed so that the analog and  
digital sections are separated and confined to certain areas of the  
board. If the AD5533 is in a system where multiple devices  
require an AGND-to-DGND connection, the connection should  
be made at one point only. The star ground point should be  
established as close as possible to the device. For supplies with  
multiple pins (VSS, VDD, and AVCC), it is recommended to tie  
those pins together. The AD5533 should have ample supply  
bypassing of 10 µF in parallel with 0.1 µF on each supply located  
as close to the package as possible, ideally right up against the  
device. The 10 µF capacitors are the tantalum bead type. The  
0.1 µF capacitor should have low effective series resistance (ESR)  
and effective series inductance (ESI), like the common ceramic  
types that provide a low impedance path to ground at high frequen-  
cies, to handle transient currents due to internal logic switching.  
The AD5533 infinite sample-and-hold is ideally suited for use  
in automatic test equipment. Several ISHAs are required to  
control pin drivers, comparators, active loads, and signal timing.  
Traditionally, sample-and-hold devices with droop were used in  
this application. These required refreshing to prevent the voltage  
from drifting.  
The AD5533 has several advantages: no refreshing is required,  
there is no droop, pedestal error is eliminated, and there is no  
need for extra filtering to remove glitches. Overall, a higher level  
of integration is achieved in a smaller area, see Figure 13.  
PARAMETRIC  
SYSTEM BUS  
MEASUREMENT  
UNIT  
ISHA  
ACTIVE  
ISHA  
LOAD  
ISHA  
The power supply lines of the AD5533 should use as large a trace  
as possible to provide low impedance paths and reduce the effects  
of glitches on the power supply line. Fast switching signals, such as  
clocks, should be shielded with digital ground to avoid radiating  
noise to other parts of the board and should never be run near  
the reference inputs. A ground line routed between the DIN and  
SCLK lines will help reduce crosstalk between them (not required  
on a multilayer board as there will be a separate ground plane but  
separating the lines will help).  
STORED  
DATA  
DRIVER  
AND INHIBIT  
PATTERN  
ISHA  
ISHA  
FORMATTER  
DUT  
PERIOD  
GENERATION  
AND  
DELAY  
TIMING  
ISHA  
ISHA  
COMPARE  
REGISTER  
Note it is essential to minimize noise on VIN and REFIN lines.  
Particularly for optimum ISHA performance, the VIN line must  
be kept noise-free. Depending on the noise performance of the  
board, a noise filtering capacitor may be required on the VIN line.  
If this capacitor is necessary, then for optimum throughput it may  
be necessary to buffer the source which is driving VIN. Avoid cross-  
over of digital and analog signals. Traces on opposite sides of the  
board should run at right angles to each other. This reduces the  
effects of feedthrough through the board. A microstrip technique is  
by far the best but not always possible with a double-sided board.  
In this technique, the component side of the board is dedicated  
to ground plane while signal traces are placed on the solder side.  
COMPARATOR  
SYSTEM BUS  
ISHAs  
Figure 13. AD5533 in an ATE System  
Typical Application Circuit  
The AD5533 can be used to set up voltage levels on 32 channels  
as shown in the circuit below. An AD780 provides the 3 V refer-  
ence for the AD5533 and for the AD5541 16-bit DAC. A simple  
3-wire interface is used to write to the AD5541. Because the  
AD5541 has an output resistance of 6.25 kΩ (typ), the time taken  
to charge/discharge the capacitance at the VIN Pin is significant.  
Hence an AD820 is used to buffer the DAC output. Note that it  
is important to minimize noise on VIN and REFIN when laying out  
this circuit.  
As is the case for all thin packages, care must be taken to avoid  
flexing the package and to avoid a point load on the surface of  
the package during the assembly process.  
AV  
CC  
AV  
CC  
V
SS  
DV  
CC  
V
DD  
V
AD820  
IN  
AD5541*  
CS  
DIN  
V
0–31  
OUT  
AD5533*  
SCLK  
OFFS_IN  
OFFS_OUT  
REFIN  
REF  
AD780*  
V
OUT  
SCLK DIN  
SYNC  
*ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 14. Typical Application Circuit  
REV. A  
–15–  
 
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AD5533ABCZ-1 替代型号

型号 品牌 替代类型 描述 数据表
AD5533ABC-1REEL ADI

完全替代

 		IC SAMPLE AND HOLD AMPLIFIER, PBGA74, 12 X 12 MM, LFBGA-74, Sample and Hold Circuit

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